103
Chapter 5 Theory of Operation
Digital Waveform, Pulse, and Sync
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5
U1508-D sets the current in Q1501 (from 0 to 60 µA) according to the
voltage difference between V_TEDLY and VREF (as buffered by U1508-A).
This current is converted to U1506-A’s threshold voltage (approximately
–0.8 V to –1.4 V) by U1508-B.
Multiplexer U1502 selects which signal is put out at the SYNC connector,
depending on the states of SYNC_CTL0 and SYNC_CTL1 from the
Synthesis IC. The SYNC signal may be a constant low, a constant high,
the output of square wave comparator U1704-A, or a signal, DSYNC,
generated within the Synthesis IC and coming by way of the
Synchronous Multiplexer and U1504. The output of U1502 (SYNCe) is
buffered and translated to TTL levels by U1503.
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