Alstom MiCOM P546 - Page 130

P54x/EN ST/La4 Settings
(ST) 4-52 MiCOM P543, P544, P545, P546
ST
Setting range
Menu text Default setting
Min. Max.
Step size
Live Bus 2 32 V
5 V 132 V 0.5 V
Bus 2 is considered Live with voltage above this setting.
Dead Bus 2 13 V
5 V 132 V 0.5 V
Bus 2 is considered De tage below thad with vol is setting.
CS UV 54 V
5 V 120 V 0.5 V
Check Synch Undervoltage setting decides that System Check Synchronism logic for CB1
will be blocked if V< is one of the selected options in setting CB1 CS Volt.Blk (48 8 E),
and either line or bus voltage is below this setting.
System Check Synchronism for CB2 will be blocked if V< is one of the selected options in
setting CB2 CS Volt. Blk (48 9 C), and either line or bus voltage is below this setting.
CS OV 130 V
60 V 200 V 0.5 V
Check Synch Overvolta cides that m loge setting de System Check Synchronis gic for CB1
is blocked if V> is one of the selected options in setting CB1 CS Volt.Blk (48 8 E), and
either line or bus voltage is above this setting.
System Check Synchronism for CB2 is blocked if V> is one of the selected options in
setting CB2 CS Volt. Blk (48 9 C), and either line or bus voltage is above this setting.
Sys Checks CB1 Disabled Enabled or Disabled
Setting to enable or disable both stages of system checks for reclosing CB1
If System Checks CB1 is set to Disabled, all other menu settings associated with
synchronism checks for CB1 become invisible, and a DDB (880) signal
SChksInactiveCB1 is set.
CB1 CS Volt. Blk V<
V< , V> , Vdiff.> , V< and V>, V< and
Vdiff> , V> and Vdiff> , V< V> and Vdiff> ,
None
Setting to determine which, if any, conditions should block synchronism check for CB1
(undervolta , overvolt diffe ) for the lige V< age V>, and/or voltage rential Vdiff etc ne and bus
voltages.
CB1 CS1 Status Enabled Enabled or Disabled
Setting to enable or disable the stage 1 synchronism check elements for auto-reclosing
and manual closing CB1.
CB1 CS1 Angle 20° 0° 90° 1°
Maximum permitted phase angle between Line ge and Bus 1 voltages for first sta
synchronism check elem lose CB1. ent to rec
CB1 CS1 VDiff 6.5 V
1 V 120 V 0.5 V
Check Synch Voltage differential setting decides that stage 1 System Check Synchronism
logic for CB1 is blocked if Vdiff> is one of the selected options in setting CB1 CS Volt.Blk
(48 8 E), and voltage magnitude difference between line and bus 1 voltage is above this
setting.
CB1 CS1 SlipCtrl Enabled Enabled or Disabled
Setting to enable or disa ing of synchro ge 1 for reclosing CB1 by ble block nism check sta
excessive frequency difference (slip) between line and bus voltages
(refer to setting CB1 CS1 SlipFreq).
CB1 CS1 SlipFreq 50 mHz 5 mHz 2 Hz 5 mHz
If CB1 CS1 Slip Ctrl is enabled, synchronism check stage 1 is blocked for reclosing CB1 if
measured frequency difference between line and bus voltages is greater than this setting.