P54x/EN OP/La4 Operation
(OP) 5-202
MiCOM P543, P544, P545 & P546
OP
The pre-closing system conditions for a given circuit breaker depend on the system
configuration and, for auto-reclosing, on the selected auto-reclose program. For example,
on a feeder with delayed auto-reclosing, the circuit breakers at the two line ends are
normally arranged to close at different times. The first line end to close usually has a live
bus and a dead line immediately before reclosing, and charges the line (dead line charge)
when the circuit breaker closes. The second line end circuit breaker sees live bus and live
line after the first circuit breaker has re-closed. If there is a parallel connection between the
ends of the tripped feeder, they are unlikely to go out of synchronism, i.e. the frequencies will
be the same, but the increased impedance could cause the phase angle between the two
voltages to increase. Therefore the second circuit breaker to close might need a
synchronism check, to ensure that the phase angle has not increased to a level that would
cause unacceptable shock to the system when the circuit breaker closes.
If there are no parallel interconnections between the ends of the tripped feeder, the two
systems could lose synchronism, and the frequency at one end could “slip” relative to the
other end. In this situation, the second line end would require a synchronism check
comprising both phase angle and slip frequency checks.
If the second line end busbar has no power source other than the feeder that has tripped; the
circuit breaker will see a live line and dead bus assuming the first circuit breaker has
re-closed. When the second line end circuit breaker closes the bus will charge from the live
line (dead bus charge).
5.7.2 Dual circuit breaker system voltage che
cks logic diagrams (P544/P546)
The system voltage checks logic is shown in AR Figure 59, Figure 60 and Figure 61 (logic
diagram supp
lement).
5.7.3 Dual circuit breaker system voltage che
cks VT selection (P544/P546)
The system voltage checks function performs a comparison of the line voltage and the bus
voltage.
For a single circuit breaker application, there will be two voltage inputs to compare – one
from the voltage transformer (VT) input from the line side of the circuit breaker, and one from
the VT on the bus side of the circuit breaker.
For a dual circuit breaker installation (breaker-and-a-half switch or mesh/ring bus), three VT
inputs are required, one from the common point of the two circuit breakers, identified as the
line, one from the bus side of CB1, and the third from the bus side of CB2. In most cases
the line VT input will be three phase, whereas the bus VTs will be single phase.
Since the bus VT inputs are normally single phase, the system voltage checks are made on
single phases, and since the VT may be connected to either a phase to phase or phase to
neutral voltage, then for correct synchronism check operation, the P544/P546 has to be
programmed with the appropriate connection. The CS Input setting in the CT AND VT
RATIOS can be set to A-N, B-N, C-N, A-B, B-C or C-A according to the application.
The single phase Bus1 VT and Bus 2 VT inputs each have associated phase shift and
voltage magnitude compensation settings CB1 CS VT PhShft, CB1 CS VT Mag., CB2 CS
VT PhShft and CB2 CS VT Mag., to compensate for healthy voltage angle and magnitude
differences between the Bus VT input and the selected line VT reference phase. This allows
the bus VT inputs to be taken from VT windings with different rated voltages or phase
connections to the reference voltage (for example, they could be taken from VTs on opposite
sides of a transformer). Any voltage measurements or comparisons using bus VT inputs are
made using the compensated values.
The system checks logic comprises two modules, one to monitor the voltages, and one to
check for synchronism.
The voltage monitor determines the voltage magnitudes, frequencies and relative phase
angles of the VT inputs using the same VT inputs as the check sync reference phase voltage
setting CS Input, The Live Line, Dead Line, etc., outputs from the voltage monitor are
qualified by blocking inputs from the P544/P546, external VT supervision, VT secondary
MCB auxiliary switch contacts, and by external inputs mapped in the PSL to DDBs (1522,
etc.) to individually inhibit the output DDBs (888, etc.) for each function.
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