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Avaya S8700 - Tdm-Clk (Tdm Bus Clock)

Avaya S8700
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TDM-CLK (TDM Bus Clock)
Issue 1 May 2002
8-1123555-233-142
TDM-CLK (TDM Bus Clock)
NOTE:
Replacing the Tone-Clock circuit pack requires a special procedure
described in the documentation for TONE-BD. That section also describes
the LED displays for this board.
The Time Division Multiplex (TDM) Bus Clock resides on the Tone-Clock circuit
pack, providing clocking signals both for the TDM bus and the LAN Bus. The
Tone-Clock circuit pack is a critical component in the system and is necessary to
ensure the operation of every port circuit pack in the system. The TDM buses of
the PPN and any EPNs are synchronized together. The system timing reference
can be derived internally from the Tone-Clock circuit pack in any PN, or from an
external (off-board) timing reference. Currently, the TDM bus Clock supports
synchronizing the TDM bus with interface rates from Digital Signal 1 (DS1)
facilities as primary or primary and secondary references.
Moreover, the Tone-Clock circuit pack aids in monitoring and selecting
synchronization references. The Tone-Clock circuit pack, after detecting that the
external source of timing is not valid, will automatically begin its escalation
procedure, according to the facilities administered. In the following table,
successive losses of signal cause escalation from left to right.
NOTE:
Switching back to a DS1 source is handled by synchronization maintenance,
once any problems with it have been corrected and tested.
See ‘‘SYNC (Port-Network Synchronization)’’ on page 8-1034 for more details
about the escalation plan. There is a strong interdependency among the DS1
Interface circuit packs Maintenance, Synchronization Maintenance, and TDM Bus
Clock Maintenance MOs.
MOs Name (in
Alarm Log) Alarm Level Initial Command to Run
1
1. UU is the universal cabinet number (164). C is the carrier designation (A, B, C, or D).
Full Name of MO
TDM-CLK MAJOR test tone-clock UUC short TDM bus Clock
TDM-CLK MINOR test tone-clock UUC short TDM bus Clock
TDM-CLK WARNING release tone-clock UUC TDM bus Clock
Tone-Clock
Role
Synchronization
Facilities
Initial External
Synchronization
Source
Backup External
Synchronization
Source
Internal
Source
MASTER DS1 Primary and
Secondary
DS1 Primary DS1 Secondary Local
oscillator
DS1 Primary Only DS1 Primary None
No External Source None None

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