Caen V1729 - Fig. 3.1: Diagram of the Calibration of the Verniers

PRELIMINARY
Document type: Title: Revision date: Revision:
User's Manual (MUT) Mod. V1729 4 Channel 12 Bit Sampling ADC 22/06/2005 3
NPO: Filename: Number of pages: Page:
00109/04:V1729.MUTx/03 V1729_REV3.DOC 38 18
Fig. 3.1: diagram of the calibration of the verniers
The codes which implement the register setting is the following:
void TCAENADC::Vernier()
{
char s[30];
SetNCols(0);
// Setto PRETRIG
SetPreTrig(1);
// Setto POSTTRIG
SetPostTrig(1);
//??
SetTriggerType(0x08);
int i;
Set PRETRIG=POSTRIG=1
Send START
ACQUISITION
Trigger
auto ?
Send SOFT TRIGGER
yes
no
Read vernier data only
next acquisition
Send RESET BOARD
Board parameters initialization
Calculate MINVER &
MAXVER for each
channel
Wait for request