PRELIMINARY
Document type: Title: Revision date: Revision:
User's Manual (MUT) Mod. V1729 4 Channel 12 Bit Sampling ADC 22/06/2005 3
NPO: Filename: Number of pages: Page:
00109/04:V1729.MUTx/03 V1729_REV3.DOC 38 27
4.5.8 Using a shifted input range
The input signal range is defined by default to be +/-0.5V. In order to shift it, one has to
make use of free CMS-805 foot-prints located around the M3 amplifier (LM4130), itself
located between the MATACQ chip and the ADC (ADS803E). The equipment map of this
zone of the board is shown below.
To shift the baseline downwards in order to deal with mainly negative pulses, mount R64
and R66.
To shift the baseline upwards in order to deal with mainly positive pulses, mount R63 and
R65.
The values of those two 1%-precision resistors must be identical. The range is saturated
with 2k: that is therefore the minimum value. The tabulation below displays the different
resistor values necessary to obtain the targeted shifts.
It is also necessary to shift the fixed reference of the vernier (VerRef2) in order to
compensate for the preceding operation at the level of the latter. Therefore, one has to
modify the value of the resistor R14 (see figure below) which is 18k by default. It realizes
a dividing bridge with R15 (20k) located just below. One has actually to shift the middle of
that bridge with a voltage proportional to the shift aimed at on the signal itself. The values
necessary for R14 thus also appear in the tabulation below.
Input range pos -neg Shift in V Value of R63 & R65 Value of R64 & R66 Value of R14
90% -10% -0,4V 2,5k X 3,6k
80% -20% -0,3V 3,3k X 6k
70% -30% -0,2V 4,6k X 9k
60% -40% -0,1V 7k X 13k
50% -50% 0V X X 18k
40% -60% +0,1V X 7k 25k
30% -70% +0,2V X 4,6k 35k
20% -80% +0,3V X 3,3k 50k
10% -90% +0,4V X 2,5k 77k
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