PRELIMINARY
Document type: Title: Revision date: Revision:
User's Manual (MUT) Mod. V1729 4 Channel 12 Bit Sampling ADC 22/06/2005 3
NPO: Filename: Number of pages: Page:
00109/04:V1729.MUTx/03 V1729_REV3.DOC 38 6
1.2 Sampling frequency
The V1729 board is sequenced by an oscillator at a frequency of 100MHz. No greater
frequency signal exists on the board. This is what explains the low consumption of the
system. The sampling at a very high frequency (Fe) in the MATACQ chip is in fact
realized by virtual multiplication of frequency inside the chip by a factor up to 20.
The MATACQ chip functions with a pilot frequency of 50MHz or 100MHz programmable
on the board by software, which corresponds to a sampling frequency Fe (= 20*Fp) of 1
or 2 GHz.
The EXT_CLK input may possibly be used to inject a very clean external pilot clock
comprised between 50MHz and 100MHz.
Caution : the MATACQ chip cannot work properly with a pilot frequency Fp lower than
50MHz.
1.3 Input signals, Dynamic range
The V1729 board integrates 4 analog channels. The inputs of these channels are
connected through double LEMO plugs (IN0+/- to IN3+/-).
The inputs are by default unipolar and terminated on 50 Ohms. However, the input levels
of the board can be very easily modified (through displacing a few resistors and mounting
new ones) in such a way as to permit the input in differential mode (from which the
double LEMO plugs). For this purpose, free CMS-805 resistor footprints are indeed
implemented on the V1729 board.
The analog to digital conversion is made on 12 bits with a maximum dynamic range of
1V, or an LSB of 250μV. This range is centered on 0V (+/- 0.5V). However, free CMS-
805 footprints are implemented on the V1729 board for shifting the dynamic range in the
interval +/- 0.5V in order to be able to optimize the system for unipolar signals.
The measured noise referred to input is less than 200 μV RMS (i-e below the lsb of the
ADC), and the non-linearity remains below 1 per 1000 over the whole dynamic range.
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