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Caen V1729 - Fig. 4.4: Synopsis of an Acquisition Channel on the

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PRELIMINARY
Document type: Title: Revision date: Revision:
User's Manual (MUT) Mod. V1729 4 Channel 12 Bit Sampling ADC 22/06/2005 3
NPO: Filename: Number of pages: Page:
00109/04:V1729.MUTx/03 V1729_REV3.DOC 38 36
The different logical level transfers present on the board are not represented in the
synopsis.
Fig. 4.4: Synopsis of an acquisition channel on the MATACQ board
The elementary block of the analog acquisition is represented in Fig 4.4. It includes:
The 50-Ohm adaptation of the input.
A large bandwidth amplifier making it possible to feed the MATACQ chip in differential.
The MATACQ chip.
A bandwidth limiter filter.
The 12bit-5MHz ADC, differential.
A register allowing the multiplexing of the data coming from the different channels
towards the RAM.
Fast Control
ADCout
BUS
Sample_Reg
MATRIX
2. Filter
+
ADC
12 12
Analog input
Conversion
: unipolar
->
differential
Register
Clk ADC
Output Enable
Fp
Ta
Ts
Slow Control
Stop
50 Ω
Sync_ Out

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