5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DIFF= 85ohm, L=4"~9"
XTAL, Zo=50Ω , L < 1 " DIFF= 85ohm, L=4"~12"
DIFF= 85ohm, L=4"~9"
(1) 32.768KHz XTAL must in SOC or PCH same side
(2) Do not use VIA
(3) At below layer cannot has power and signal
(4) RTC (10M Ohm RES) Do not change to 0402
32.768KHz XTAL
P/N: 6-22-32R76-0B2
P/N: 6-22-32R76-0BJ
32.768KHz
XTAL 24MHz 20ppm CL<=12pF
24MHz XTAL
P/N: 6-22-24R00-1BA
P/N: 6-22-24R00-1B9
24 MHz
close to PCH
DIFF= 85ohm, L=4"~10"
DIFF= 85ohm, L=4"~12"
DIFF= 85ohm, L=4"~10"
DIFF= 85ohm, L=4"~10"
XCLK_RBIAS, L < 1 "
RTC, Zo=50Ω , L < 1 "
CLKREQ#, Zo=50Ω
WLAN, SSD with CONN L<10"
Other without CONN L<12"
DIFF= 85ohm, L=4"~12"
Zo= 50ohm, L<10"
PCH_XDP_CLK_DN
PCH_XDP_CLK_DP
SSD2_CLKREQ#
SSD1_CLKREQ#
GLAN_CLKREQ#
PEG_CLKREQ#
WLAN_CLKREQ#
TBT_CLKREQ#
CR_CLKREQ#
GLAN_CLKREQ#
XTAL24_OUT_PCH
XCLK_RBIAS
RTC_X1
RTC_X2
TBT_CLKREQ#
XTAL24_IN_PCH
SSD2_CLKREQ#
CR_CLKREQ#
SSD1_CLKREQ#
WLAN_CLKREQ#
PEG_CLKREQ#
RTC_X1
RTC_X2
XTAL24_IN_PCH
XTAL24_OUT_PCH
3.3VS
VGA_PEXCLK# [14]
VGA_PEXCLK [14]
CLK_PCIE_GLAN# [45]
CLK_PCIE_GLAN [45]
CLK_PCIE_WLAN [55]
CLK_PCIE_WLAN# [55]
CLK_PCIE_SSD1# [54]
CLK_PCIE_SSD1 [54]
CLK_PCIE_SSD2# [54]
CLK_PCIE_SSD2 [54]
CLK_PCIE_CR# [58]
CLK_PCIE_CR [58]
TBT_REFCLK_100_P [46]
TBT_REFCLK_100_N [46]
PCH_CPU_BCLK_R_DN[4]
CPU_24MHZ_R_DN[4]
PCH_CPU_BCLK_R_DP[4]
CPU_24MHZ_R_DP[4]
CLKIN_XTAL_LCP [55]
PCH_CPU_PCIBCLK_R_DN [4]
PCH_CPU_PCIBCLK_R_DP [4]
3.3VS[8,9,10,11,12,28,32,33,35,36,37,41,42,43,44,45,47,49,54,56,57,58,59,63,64,70]
PCIE_SSD1_RST#[54]
PCIE_SSD2_RST#[54]
GPP_H8_LAN_RST#[45]
GPP_H9_TBT_WAKE#[46]
GPP_B7_CR_RST#[58]
GPP_B8_CR_WAKE#[58]
GLAN_CLKREQ#[45]
WLAN_CLKREQ#[55]
CR_CLKREQ#[58]
PEG_CLKREQ#[14]
SSD2_CLKREQ#[54]
SSD1_CLKREQ#[54]
TBT_CLKREQ#[46]
Title
Size
Document Number R e v
Date: Sheet
of
6-71-PB5D0-D02
D02
[38] PCH G/13-CLKOUT
A4
38
84Friday, December 27, 2019
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
PB50DF2
Title
Size
Document Number R e v
Date: Sheet
of
6-71-PB5D0-D02
D02
[38] PCH G/13-CLKOUT
A4
38
84Friday, December 27, 2019
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
PB50DF2
Title
Size
Document Number R e v
Date: Sheet
of
6-71-PB5D0-D02
D02
[38] PCH G/13-CLKOUT
A4
38
84Friday, December 27, 2019
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
PB50DF2
RN2
10K_8P4R_04
1
2
3
4 5
6
7
8
X6
1TJS125DJ4A420P_32.768KHz
PCB Footprint = CM200S
14
3 2
C1514 15p_50V_NPO_04
7 OF 13
U30G
CML-H QS64
CLKOUT_CPUNSSC_P
D7
CLKOUT_CPUBCLK_P
B8
XTAL_OUT
U9
XTAL_IN
U10
XCLK_BIASREF
T3
RTCX1
BA49
RTCX2
BA48
CLKOUT_ITPXDP_P
Y4
CLKOUT_CPUPCIBCLK_P
A6
CLKOUT_CPUBCLK
C8
CLKOUT_CPUNSSC
C6
CLKOUT_CPUPCIBCLK
B6
CLKOUT_ITPXDP
Y3
CLKOUT_PCIE_P15
V3
GPP_B10/SRCCLKREQ5#
AN29
GPP_H0/SRCCLKREQ6#
AE47
GPP_B6/SRCCLKREQ1#
BE31
CLKOUT_PCIE_P0
AJ7
CLKOUT_PCIE_P1
AH10
CLKOUT_PCIE_N0
AJ6
CLKOUT_PCIE_P2
AE15
CLKOUT_PCIE_N1
AH9
CLKOUT_PCIE_P3
AE7
GPP_B7/SRCCLKREQ2#
AR32
CLKOUT_PCIE_N2
AE14
GPP_H1/SRCCLKREQ7#
AC48
CLKOUT_PCIE_P4
AC3
CLKIN_XTAL
R6
CLKOUT_PCIE_N3
AE6
CLKOUT_PCIE_P5
AB3
CLKOUT_PCIE_P6
W3
CLKOUT_PCIE_N4
AC2
CLKOUT_PCIE_P7
W6
GPP_H9/SRCCLKREQ15#
AC43
CLKOUT_PCIE_N5
AB2
CLKOUT_PCIE_N6
W4
GPP_H6/SRCCLKREQ12#
AE39
CLKOUT_PCIE_N10
AC9
GPP_H8/SRCCLKREQ14#
AC44
GPP_H5/SRCCLKREQ11#
AC39
CLKOUT_PCIE_P8
AC15
GPP_H7/SRCCLKREQ13#
AB48
CLKOUT_PCIE_N7
W7
CLKOUT_PCIE_P9
U3
GPP_B8/SRCCLKREQ3#
BB30
CLKOUT_PCIE_N11
AE9
GPP_H2/SRCCLKREQ8#
AE41
GPP_H4/SRCCLKREQ10#
AC41
GPP_A16/CLKOUT_48
BE33
CLKOUT_PCIE_N12
AC7
CLKOUT_PCIE_N8
AC14
CLKOUT_PCIE_P10
AC11
CLKOUT_PCIE_N9
U2
CLKOUT_PCIE_P11
AE11
CLKOUT_PCIE_N13
AA1
CLKOUT_PCIE_N14
T2
GPP_B5/SRCCLKREQ0#
BF31
CLKOUT_PCIE_P12
AC6
CLKOUT_PCIE_P13
Y2
CLKOUT_PCIE_N15
V2
GPP_H3/SRCCLKREQ9#
AF48
CLKOUT_PCIE_P14
T1
GPP_B9/SRCCLKREQ4#
BA30
R235 60.4_1%_04
R821
10M_06
R269 10K_04
C1513 15p_50V_NPO_04
C1393 12p_50V_NPO_04
R691
200K_1%_04
C1392 12p_50V_NPO_04
RN1
10K_8P4R_04
1
2
3
4 5
6
7
8
X5
W76-147_24MHZ
PCB Footprint = FSX3M
2 1
3 4
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