Cmsemicon SC8F577 Series - Page 4

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9.3 TIMER2 RELATED REGISTER ......................................................................................................................................... 73
10. ANALOG TO DIGITAL CONVERSION (ADC) .................................................................. 74
10.1 ADC GENERAL ............................................................................................................................................................. 74
10.2 ADC CONFIGURATION ................................................................................................................................................... 75
10.2.1 Port configuration .................................................................................................................................................. 75
10.2.2 Channel selection .................................................................................................................................................. 75
10.2.3 ADC internal base voltage .................................................................................................................................... 75
10.2.4 ADC reference voltage .......................................................................................................................................... 75
10.2.5 Converter clock ..................................................................................................................................................... 76
10.2.6 ADC Interrupt ........................................................................................................................................................ 77
10.2.7 Output Formatting ................................................................................................................................................. 77
10.3 ADC WORKING PRINCIPLE ............................................................................................................................................. 78
10.3.1 Start conversion .................................................................................................................................................... 78
10.3.2 Complete conversion ............................................................................................................................................ 78
10.3.3 Stop conversion .................................................................................................................................................... 78
10.3.4 Working principle of ADC in sleep mode ............................................................................................................... 78
10.3.5 A/D conversion procedure ..................................................................................................................................... 79
10.4 ADC RELATED REGISTER ............................................................................................................................................. 80
11. PWM MOD ......................................................................................................................... 83
11.1 PIN CONFIGURATION ..................................................................................................................................................... 83
11.2 PWM RELATED REGISTER ............................................................................................................................................ 83
11.3 SEQUENCE OF PWM REGISTER WRITE OPERATION .......................................................................................................... 88
11.4 PWM PERIOD ............................................................................................................................................................. 88
11.5 PWM DUTY CYCLE ...................................................................................................................................................... 88
11.6 SYSTEM CLOCK FREQUENCY CHANGES .......................................................................................................................... 88
11.7 PROGRAMMABLE DEAD-TIME DELAY MODE ....................................................................................................................... 89
11.8 CONFIGURATE PWM .................................................................................................................................................... 89
12. PROGRAM EEPROM AND PROGRAM MEMORY CONTROL ........................................ 90
12.1 GENERAL .................................................................................................................................................................... 90
12.2 RELATED REGISTER ..................................................................................................................................................... 91
12.2.1 EEADR and EEADRH Register............................................................................................................................. 91
12.2.2 EECON1 and EECON2 Register .......................................................................................................................... 91
12.3 READ PROGRAM EEPROM .......................................................................................................................................... 93
12.4 WRITE PROGRAM EEPROM......................................................................................................................................... 94
12.5 READ PROGRAM MEMORY ............................................................................................................................................ 96
12.6 WRITE PROGRAM MEMORY ........................................................................................................................................... 96
12.7 PRECAUTIONS ON PROGRAM EEPROM ......................................................................................................................... 97
12.7.1 Programming Time for Program EEPROM ........................................................................................................... 97
12.7.2 Write Verification ................................................................................................................................................... 97
12.7.3 Protection to Avoid Writing Wrongly ...................................................................................................................... 97
13. CONSTANT CURRENT OUTPUT ..................................................................................... 98
13.1 THE RELATED REGISTER OF CONSTANT CURRENT OUTPUT ................................................................................................ 98
13.2 THE OPERATION FLOW OF CONSTANT CURRENT OUTPUT ................................................................................................... 98
14. COMPARATOR (COMP) ................................................................................................... 99
14.1 THE BLOCK DIAGRAM OF COMPARATOR ........................................................................................................................... 99
14.2 THE RELATED REGISTER OF COMP .............................................................................................................................. 99
15. PROGRAMMABLE GAIN AMPLIFIER (PGA) ................................................................ 100