Cmsemicon SC8F577 Series - Page 3

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SC8F577x
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5.2 AWAKEN FROM SLEEP MODE ......................................................................................................................................... 40
5.3 INTERRUPT AWAKENING ................................................................................................................................................ 41
5.4 SLEEP MODE APPLICATION ........................................................................................................................................... 41
5.5 SLEEP MODE AWAKEN TIME .......................................................................................................................................... 42
6. I/O PORT ........................................................................................................................... 43
6.1 I/O SUMMARY .............................................................................................................................................................. 43
6.2 PORTA ...................................................................................................................................................................... 46
6.2.1 PORTA Data and Direction Control ....................................................................................................................... 46
6.2.2 PORTA Analog Control Selection .......................................................................................................................... 47
6.2.3 PORTA Pull Up Resistance ................................................................................................................................... 47
6.2.4 PORTA Pull Down Resistance .............................................................................................................................. 48
6.2.5 PORTA Level Change Interrupt ............................................................................................................................. 48
6.3 PORTB ...................................................................................................................................................................... 50
6.3.1 PORTB Data and Direction ................................................................................................................................... 50
6.3.2 PORTB Analog Selection Control .......................................................................................................................... 51
6.3.3 PORTB Pull Down Resistance .............................................................................................................................. 51
6.3.4 PORTB Pull up Resistance ................................................................................................................................... 52
6.3.5 PORTB Level Change Interrupt ............................................................................................................................ 52
6.4 PORTC ...................................................................................................................................................................... 54
6.4.1 PORTC Data and Direction ................................................................................................................................... 54
6.4.2 PORTC Analog Control Selection ......................................................................................................................... 55
6.4.3 PORTC Pull Down Resistance .............................................................................................................................. 55
6.4.4 PORTC Pull up Resistance ................................................................................................................................... 56
6.4.5 PORTC Level Change Interrupt ............................................................................................................................ 56
6.5 I/O USAGE .................................................................................................................................................................. 58
6.5.1 Write I/O Port ........................................................................................................................................................ 58
6.5.2 Read I/O Port ........................................................................................................................................................ 58
6.6 PRECAUTIONS FOR I/O PORT USAGE ............................................................................................................................. 59
7. INTERRUPT ...................................................................................................................... 60
7.1 INTERRUPT GENERAL ................................................................................................................................................... 60
7.2 INTERRUPT CONTROL REGISTER .................................................................................................................................... 61
7.2.1 Interrupt Control Register ...................................................................................................................................... 61
7.2.2 Peripherals Interrupt Enable Register ................................................................................................................... 62
7.2.3 Peripherals Interrupt Request Register ................................................................................................................. 64
7.3 PROTECTION METHODS FOR INTERRUPT ......................................................................................................................... 66
7.4 INTERRUPT PRIORITY AND MULTI-INTERRUPT NESTING ..................................................................................................... 66
8. TIMER0.............................................................................................................................. 67
8.1 TIMER0 GENERAL ...................................................................................................................................................... 67
8.2 WORKING PRINCIPLE FOR TIMER0 ............................................................................................................................... 68
8.2.1 8-bit Timer Mode ................................................................................................................................................... 68
8.2.2 8-bit Counter Mode ............................................................................................................................................... 68
8.2.3 Software Programmable Pre-scaler ...................................................................................................................... 68
8.2.4 Switch Prescaler Between TIMER0 and WDT Module .......................................................................................... 69
8.2.5 TIMER0 Interrupt .................................................................................................................................................. 69
8.3 TIMER0 RELATED REGISTER ........................................................................................................................................ 70
9. TIMER2.............................................................................................................................. 71
9.1 TIMER2 GENERAL ...................................................................................................................................................... 71
9.2 WORKING PRINCIPLE OF TIMER2 ................................................................................................................................. 72