TMP93CS41F (AU: IC301)TMP93CS41F (AU: IC301)
NameName FunctionFunction
TMP93CS41F Terminal FunctionTMP93CS41F Terminal Function
PinPin
No.No.
11 V REFLV REFL A/D ref. GNDA/D ref. GND
22 A VssA Vss ←← A/D GNDA/D GND
33 A VccA Vcc ←← AD +5VAD +5V
44 _NMI_NMI II Not used (fixed to H)Not used (fixed to H)
55 P70/TI0P70/TI0 C15C15 OO CC LL LL Fixed to L (DSP ROM address cont. out bit 15, not used)Fixed to L (DSP ROM address cont. out bit 15, not used)
66 P71/TO1P71/TO1 C16C16 OO CC LL LL DSP program ROM address cont. output bit 16DSP program ROM address cont. output bit 16
77 P72/TO2P72/TO2 C17C17 OO CC LL LL DSP program ROM address cont. output bit 17DSP program ROM address cont. output bit 17
88 P73/TO3P73/TO3 OO CC LL LL
99 P80/INT4/TI4P80/INT4/TI4 _INTREQ_INTREQ I/OI/O CC EuEu EE↓↓&L&L ZZ DSP request input and cont. output (L: Rq & cont.)DSP request input and cont. output (L: Rq & cont.)
1010 P81/INT5/TI5P81/INT5/TI5 B. DOWN_B. DOWN_ II EuEu EE↑↑&L&L ZZ Power down detect (H: Detected)Power down detect (H: Detected)
1111 P82/TO4P82/TO4 DSP SSDSP SS OO CC ZZ LL
1212 P83/TO5P83/TO5 _REQ_REQ OO CC EuEu HH LL
MAIN-SUB CPU comm. control output (L: Comm. request fromMAIN-SUB CPU comm. control output (L: Comm. request from
sub)sub)
1313 P84/INT6/TI6P84/INT6/TI6 _ACK_ACK II EuEu EE↓↓&L&L MAIN-SUB CPU comm. control input (L: Ack. return from main)MAIN-SUB CPU comm. control input (L: Ack. return from main)
1414 P85/INT7/TI7P85/INT7/TI7 ERRERR II EE↑↑&L&L DIR control input terminal (LC89055Q)( H: ERR)DIR control input terminal (LC89055Q)( H: ERR)
1515 P86/TO6P86/TO6 _DSP RESET_DSP RESET OO CC LL LL DSP reset output terminal (L: Reset)DSP reset output terminal (L: Reset)
1616 P87/INT0P87/INT0 _CS_CS II EE↑↑&L&L
DIR control input terminal (LC89055Q), when CH status changeDIR control input terminal (LC89055Q), when CH status change
LL→→HH
1717 P90/TXD0P90/TXD0 SISI OO CC MAIN-SUB CPU comm. control terminal (data output)MAIN-SUB CPU comm. control terminal (data output)
1818 P91/RXD0P91/RXD0 SOSO II MAIN-SUB CPU comm. control terminal (data input)MAIN-SUB CPU comm. control terminal (data input)
1919
P92/_CTS0/SCLK0P92/_CTS0/SCLK0
CLKCLK II CC MAIN-SUB CPU comm. control terminal MAIN-SUB CPU comm. control terminal (I2C clock in/output)(I2C clock in/output)
2020 P93/TXD1P93/TXD1 DSP DATADSP DATA OO CC ZZ LL
2121 P94/RXD1P94/RXD1 DSP SODSP SO OO CC LvLv ZZ LL
2222 P95/SCLK1P95/SCLK1 DSP CLKDSP CLK OO CC ZZ LL
2323 AM8/_16AM8/_16 ←← Fixed to +5VFixed to +5V
2424 CLKCLK OO CC EuEu
2525 VccVcc ←← +5V+5V
2626 VssVss I/O1I/O1 GNDGND
2727 X1X1 XinXin II XX′′tal connectiontal connection
2828 X2X2 XoutXout OO XX′′tal connectiontal connection
2929 _EA_EA ←← Fixed to GNDFixed to GND
3030 _RESET_RESET RESET2_RESET2_ II EuEu LvLv LL Reset input (controlled by main CPU)Reset input (controlled by main CPU)
3131 P96/XT1P96/XT1 A/D RESETA/D RESET OO NN EuEu HH HH A/D control terminal (L: Reset)A/D control terminal (L: Reset)
3232 P97/XT2P97/XT2 OO CC EdEd LL LL
3333 TEST1TEST1 ←← ΙΙ Connected to TEST2Connected to TEST2
3434 TEST2TEST2 ←← ΙΙ Connected to TEST1Connected to TEST1
3535 PA0PA0 DINADINA OO CC EdEd LL LL Digital input switching control outputDigital input switching control output
3636 PA1PA1 DINBDINB OO CC EdEd LL LL Digital input switching control outputDigital input switching control output
3737 PA2PA2 DINCDINC OO CC EdEd LL LL Digital input switching control outputDigital input switching control output
3838 PA3PA3 OO CC EdEd LL LL
3939 PA4PA4 DIRECTDIRECT OO CC EdEd LL LL Digital direct data switch cont. terminal (H: Direct)Digital direct data switch cont. terminal (H: Direct)
4040 PA5PA5 OO CC EdEd LL LL
SymbolSymbol
I/OI/O TypeType OpOp DetDet ResRes InitInit
NameName
FunctionFunction
PinPin
No.No.
4141 PA6PA6 DEEMPDEEMP OO CC EdEd LL LL DAC de-emphasis filter cont. out terminal (H: ON)DAC de-emphasis filter cont. out terminal (H: ON)
4242 PA7/SCOUTPA7/SCOUT 96k-DAC96k-DAC OO CC ZZ LL DAC control terminal (H: Sample frequency 96kHz)DAC control terminal (H: Sample frequency 96kHz)
4343 ALEALE ←← OO CC LL LL Address latch enableAddress latch enable
4444 VccVcc +5V+5V
4545 P00/AD0P00/AD0 AD0AD0 II
4646 P01/AD1P01/AD1 AD1AD1 II
4747 P02/AD2P02/AD2 AD2AD2 II
4848 P03/AD3P03/AD3 AD3AD3 II
4949 P04/AD4P04/AD4 AD4AD4 II
5050 P05/AD5P05/AD5 AD5AD5 II
5151 P06/AD6P06/AD6 AD6AD6 II
5252 P07/AD7P07/AD7 AD7AD7 II
5353 P10/AD8/A8P10/AD8/A8 A8A8 II
5454 P11/AD9/A9P11/AD9/A9 A9A9 II
5555 P12/AD10/A10P12/AD10/A10 A10A10 II
5656 P13/AD11/A11P13/AD11/A11 A11A11 II
5757 P14/AD12/A12P14/AD12/A12 A12A12 II
5858 P15/AD13/A13P15/AD13/A13 A13A13 II
5959 P16/AD14/A14P16/AD14/A14 A14A14 II
6060 P17/AD15/A15P17/AD15/A15 A15A15 II
6161 _WDTOUT_WDTOUT ←← OO CC ZZ HH
6262 VssVss ←← GNDGND
6363 VccVcc ←← +5V+5V
6464 P20/A0/A16P20/A0/A16 A16A16 II
6565 P21/A1/A17P21/A1/A17 DIR CLKDIR CLK OO CC ZZ LL DIR control terminal (LC89055Q) control clock outputDIR control terminal (LC89055Q) control clock output
6666 P22/A2/A18P22/A2/A18 DIR CEDIR CE OO CC ZZ LL DIR control terminal (LC89055Q) control chip enable outputDIR control terminal (LC89055Q) control chip enable output
6767 P23/A3/A19P23/A3/A19 DIR MOSIDIR MOSI OO CC ZZ LL DIR control terminal (LC89055Q) control data outputDIR control terminal (LC89055Q) control data output
6868 P24/A4/A20P24/A4/A20 DIR MISODIR MISO II LvLv DIR control terminal (LC89055Q) control data inputDIR control terminal (LC89055Q) control data input
6969 P25/A5/A21P25/A5/A21 SW-SUMSW-SUM OO CC LL LL Subwoofer output summation cont. outputSubwoofer output summation cont. output
7070 P26/A6/A22P26/A6/A22 DAC-RESETDAC-RESET OO CC LL HH
DAC control terminal (L: Power down mode, DAC control terminal (L: Power down mode,
→→
(rising edge) Reset)(rising edge) Reset)
7171 P27/A7/A23P27/A7/A23 SEL CKSEL CK OO CC ZZ LL ADC/DIR data clock switching control terminal (L: ADC)ADC/DIR data clock switching control terminal (L: ADC)
7272 P30/_RDP30/_RD _RD_RD OO CC ZZ LL
7373 P31/_WRP31/_WR _WR_WR OO CC ZZ LL
7474 P32/_HWRP32/_HWR CSICSI II LvLv DIR control input terminal (L: PCM)DIR control input terminal (L: PCM)
7575 P33/_WAITP33/_WAIT ERR MUTE_ERR MUTE_ OO CC LL LL Pop noise preventive mute control output (L: Mute)Pop noise preventive mute control output (L: Mute)
7676 P34/_BUSRQP34/_BUSRQ II
7777 P35/_BUSRQP35/_BUSRQ DIG. (AC3) MUTEDIG. (AC3) MUTE OO CC ZZ LL Digital mute control output (L: AC-3 or DTS decode enable)Digital mute control output (L: AC-3 or DTS decode enable)
7878 P36/_R/WP36/_R/W II
7979 P37/_RASP37/_RAS DIR RESETDIR RESET OO CC ZZ LL DIR control output (LC89055Q) (L: Reset)DIR control output (LC89055Q) (L: Reset)
8080 P40/_CS0/_CAS0P40/_CS0/_CAS0 OO CC ZZ LL
8181
P41/_CS1/_CAS1P41/_CS1/_CAS1
OO CC ZZ LL
8282
P42/_CS2/_CAS2P42/_CS2/_CAS2
_CS0_CS0 OO CC ZZ LL Flash memory control terminalFlash memory control terminal
8383 P60/PG00P60/PG00 DSP C. RESETDSP C. RESET OO CC ZZ LL DSP reset output terminal (L: Reset)DSP reset output terminal (L: Reset)
8484 P61/PG01P61/PG01 SCDOUTSCDOUT II LvLv DSP status data input terminalDSP status data input terminal
8585 P62/PG02P62/PG02 DSP_C. CSDSP_C. CS OO CC ZZ LL DSP chip select cont. output (L: Data out)DSP chip select cont. output (L: Data out)
8686 P63/PG03P63/PG03 DSP C. CLKDSP C. CLK OO CC ZZ LL DSP data clock output terminalDSP data clock output terminal
8787 P64/PG10P64/PG10 SCDINSCDIN OO CC ZZ LL DSP data output terminalDSP data output terminal
8888 P65/PG11P65/PG11 OO CC ZZ LL
8989 P66/PG12P66/PG12 OO CC ZZ LL
9090 P67/PG13P67/PG13 OO CC ZZ LL
9191 VssVss ←← GNDGND
9292 P50/AN0P50/AN0 II
9393 P51/AN1P51/AN1 II
9494 P52/AN2P52/AN2 EMPEMP II LvLv H: EMP onH: EMP on
9595 P53/AN3P53/AN3 96K DET96K DET II LvLv 96k signal detect input, H: 96k96k signal detect input, H: 96k
9696 P54/AN4P54/AN4 II
9797 P55/AN5P55/AN5 II
9898 P56/AN6P56/AN6 II
9999 P57/AN7P57/AN7 II
100100 V REFHV REFH ←← AD ref. +5VAD ref. +5V
SymbolSymbol
I/OI/O TypeType OpOp DetDet ResRes InitInit
75
76
100
1
25
26
50
51
1414
AVR-2801/981AVR-2801/981
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3
7
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3
1
5
1
5
0
9
9
2
8
9
4
2
9
8
T
E
L
1
3
9
4
2
2
9
6
5
1
3
9
9
2
8
9
4
2
9
8
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5
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Q
Q
TEL 13942296513 QQ 376315150 892498299
TEL 13942296513 QQ 376315150 892498299
http://www.xiaoyu163.com
http://www.xiaoyu163.com
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