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Denon AVR-X4100W

Denon AVR-X4100W
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A3V64S40GTP-60 Block Diagram
A3V56S30FTP
A3V56S40FTP
256M Single Data Rate Synchronous DRAM
Revision 1.1 Mar., 2010
Page 3 / 39
Note:This figure shows the A3V56S30FTP
The A3V56S40FTP configuration is 8192x512x16 of cell array and DQ0-15
Type Designation Code
A 3V 56 F G6
Speed Grade 75 133MHz@CL=3
7 143MHz@CL=3
6 166MHz@CL=3
G Green
Package Type TPTSOP (II)
Process Generation
Function Reserved for Future Use
Organization 2
n
3x8, 4x16
SDR Synchronous DRAM
Density 56256M bits
Interface VLVTTL
Memory Style (DRAM)
Zentel DRAM
189

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