Menu 10 Introduction
Parameter
x.00
Parameter
description format
Keypad and
display
Serial
communications
CT Modbus
RTU
PLC Ladder
programming
CTSoft Menu 0
Advanced parameter
descriptions
136 Commander SK Advanced User Guide
www.controltechniques.com Issue Number: 9
Therefore full power braking period (Pr 10.31) Tp = E / P
av
The resistance of the braking resistor R, the total energy E and the average power P
av
can normally be obtained for the resistor and used to calculate
Pr 10.30 and Pr 10.31.
The temperature of the resistor is monitored by the braking energy accumulator (Pr 10.39). When this parameter reaches 100% the drive will trip if
Pr 10.37 is 0 or 1, or will disable the braking IGBT until the accumulator falls below 95% if Pr 10.37 is 2 or 3. The second option is intended for
applications with parallel connected DC buses where there are several braking resistors, each of which cannot withstand full DC bus voltage
continuously. The braking load will probably not be shared equally between the resistors because of voltage measurement tolerances within the
individual drives. However, once a resistor reaches its maximum temperature its load will be reduced, and be taken up by another resistor.
If this flag is set to On(1) then the drive will trip (Et). If an external trip function is required, a digital input should be programmed to control this bit (see
section 10.9 Menu 8: Digital inputs and outputs on page 109).
An OFF to On change on this parameter will cause a drive reset. If a drive reset terminal is required on the drive the required terminal must be
programmed to control this bit.
If Pr 10.34 is set to zero then no auto reset attempts are made. Any other value will cause the drive to automatically reset following a trip for the
number of times programmed. Pr 10.35 defines the time between the trip and the auto reset (this time is always at least 10s for OI.AC, OI.br trips,
etc.). The reset count is only incremented when the trip is the same as the previous trip, otherwise it is reset to 0. When the reset count reaches the
programmed value, any further trip of the same value will not cause an auto-reset. If there has been no trip for 5 minutes then the reset count is
cleared. Auto reset will not occur on UU, Et, EEF or HFxx trips. When a manual reset occurs the auto reset counter is reset to zero.
If this parameter is OFF(0) then Pr 10.01 (Drive ok) is cleared every time the drive trips regardless of any auto-reset that may occur. When this
parameter is set, the 'drive ok' indication is not cleared on a trip if an auto-reset is going to occur.
Once all the resets have occured, the reset counter is reset to 0. To activate again, a manual reset is required.
10.32 External trip
Coding
Bit SP FI DE Txt VM DP ND RA NC NV PT US RW BU PS
111
Range OFF(0) or On(1)
Default OFF(0)
Update rate Background
10.33 Drive reset
Coding
Bit SP FI DE Txt VM DP ND RA NC NV PT US RW BU PS
111
Range OFF(0) or On(1)
Default OFF(0)
Update rate 21 ms
10.34 No. of auto-reset attempts
Coding
Bit SP FI DE Txt VM DP ND RA NC NV PT US RW BU PS
111
Range 0 to 5
Default 0
Update rate Background
10.35 Auto-reset delay
Coding
Bit SP FI DE Txt VM DP ND RA NC NV PT US RW BU PS
1 111
Range 0.0 to 25.0 s
Default 1.0
Update rate Background
10.36 Hold ‘drive ok’ until last attempt
Coding
Bit SP FI DE Txt VM DP ND RA NC NV PT US RW BU PS
111
Range OFF(0) or On(1)
Default OFF(0)
Update rate Background
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