3 Application Interfaces
32
Figure 10. OC/OD drive reset reference circuit
Figure 11. Button control bit reference circuit
Reset signal is a sensitive signal, so it is recommended to add a debounce capacitor (< 10
nf) close to the module.
⚫ Software reset
AT+CFUN=15
PCB Design
RESET_N is a sensitive signal. During PCB layout, keep this signal far away from RF
interference.
PCB routes must be protected using GND and kept away from edges of PCBs to avoid
module reset due to ESD problems.
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