Furuno FAR-2807 Series - Page 263

4.11 Alarm Output Setting
4-60
Fig 4.11.3 Diagram of System Fail Alarm Signal Output
Set as “Normally close”
Fig. 4.11.4 SYSTEM FAIL ALARM Sequence-1
Set as “Normally open”
Fig. 4.11.5 SYSTEM FAIL ALARM Sequence-2
Power OFF
Power ON Power OFF
SYS FAIL ALARM
resolved
Open
Closs
[ALARM ACK] ON
Initializing
Delay
SYS FAIL ALARM
Occur
BZ ON
BZ ON
BZ OFF
BZ OFF
SYSTEM FAIL ALARM --> INVERT
30sec
10sec
Power OFF
Power ON Power OFF
SYSTEM FAIL ALARM
resolved
Open
Closs
[ALARM ACK] ON
Initializing
Delay
SYSTEM FAIL ALARM
Occur
BZ ON
BZ ON
BZ OFF
BZ OFF
SYSTEM FAIL ALARM --> NORMAL
30sec 10sec
TX/RX 0
TX/RX 1
U8
CPU
SYS FAIL H
SYS FAIL
SYS FAIL C
1
1
2
2
3
4
11121 to 8
J507
J622
J501
J502
J602
GND
SYS FAIL N
SYS FAIL H
SYS FAIL H
SYS ACK H
SYS ACK N
SYS FAIL C
SYS FAIL C
1
23
4
GND
U14
U12
(PS7241 1B)
9
10
9
9
10
S36
(DIP SW)
BZ
U9
SOUND
RADAR OK
RCU-014RPU-013
EXT ALARM ACK N
EXT
ALARM ACK
1
2
J506
GND
EMRI
REMOTE
KEY
KEY
EXT ALARM
J612
- ALARM 1
- ALARM 2
- ALARM 3
- ALARM 4
ALARM SYSTEM
U21
MAIN CPU