GE RX3i

Chapter 5. Ethernet Global Data
GFK-2224Q January 2017 81
Operating Sequence for CPU Clock Synchronization
The following diagram illustrates the sequence of events for setup and operation of a system that uses clock
synchronization.
Machine Edition
CPU
Ethernet Module
SNTP Time Server
HWC + AUP file
HWC + AUP file
ENET config + AUP
- enable SNTP protocol
- CPU time sync feature
User Logic:
Read SNTP Time Stratum
via COMMREQ 5001
Update ENET TOD
Update time in shared memory
SNTP network time
Process SNTP time msg;
Lock onto time server
User Logic:
- Choose ENET to use
for CPU time sync
- Enable CPU Time
Update interrupt
via COMMREQ 5002
(CPU Time Update
interrupt is not enabled;
do not send)
Process COMMREQ 5002
Update ENET TOD
Update time in shared memory
SNTP network time
Process SNTP time message
(CPU Time Update
interrupt is enabled)
Send CPU Time Update
interrupt
Process interrupt
- Update CPU TOD clock
1
4
3
2
Update ENET TOD
Update time in shared memory
(CPU Time Update
interrupt is enabled)
Send CPU Time Update
interrupt
Process interrupt
- Update CPU TOD clock
Send COMMREQ Status
Figure 44: Operating Sequence for CPU Clock Synchronization