GOWIN UART Master IP - Table of Contents

Contents
IPUG511-1.4E
i
Contents
Contents ................................................................................................................ i
List of Figures ..................................................................................................... iii
List of Tables ...................................................................................................... iv
1 About This Manual ........................................................................................... 1
1.1 Manual Content .................................................................................................................. 1
1.2 Applicable Products ............................................................................................................ 1
1.3 Related Documents ............................................................................................................ 1
1.4 Terms and Abbreviations .................................................................................................... 1
1.5 Technical Support and Feedback ....................................................................................... 2
2 Function Introduction ...................................................................................... 3
2.1 Overview ............................................................................................................................. 3
2.2 Features .............................................................................................................................. 3
2.2.1 Gowin UART Master IP ................................................................................................... 3
2.2.2 Gowin UART Slave IP ..................................................................................................... 3
3 Signal Definition .............................................................................................. 4
3.1 Gowin UART Master IP ...................................................................................................... 4
3.1.1 SRAM Interface Signal .................................................................................................... 4
3.1.2 UART Side Signal ............................................................................................................ 4
3.2 Gowin UART Slave IP ........................................................................................................ 5
4 Working Principle ............................................................................................ 6
4.1 System Diagram ................................................................................................................. 6
4.2 Gowin UART Master IP Register ........................................................................................ 6
4.2.1 Receive Buffer Register (RBR) ........................................................................................ 7
4.2.2 Transmit Holding Register (THR) .................................................................................... 7
4.2.3 Interrupt Enable Register (IER) ....................................................................................... 7
4.2.4 Interrupt Identification Register (IIR)................................................................................ 8
4.2.5 Line Control Register (LCR) ............................................................................................ 9
4.2.6 Modem Control Register (MCR) ...................................................................................... 9
4.2.7 Line Status Register (LSR) ............................................................................................ 10
4.2.8 Modem Status Register (MSR) ...................................................................................... 11
4.3 Gowin UART Slave Implementation ................................................................................. 12
5 Interface Configuration ................................................................................. 13
5.1 UART MASTER IP Core Interface .................................................................................... 13
5.2 UART SLAVE IP Core Interface ....................................................................................... 14