Hologic DISCOVERY A - Page 50

Discovery QDR Series Technical Manual
2-28
Figure 2-12. C-Arm Interface Board/Analog/Digital Converter Board
Interconnection Diagram
Table 2-16. C-Arm Interface Board/Analog/Digital Converter Board
Interconnection Descriptions
Signal Description
C-Arm
1
Pin
ADC
2
Pin
STD+
STD-
Synchronous data to the Analog/Digital
Converter board.
JP10-3
JP10-4
P1-12
P1-13
STCLK+
STCLK-
Synchronizes data to the Analog/Digital
Converter board.
JP10-6
JP10-7
P1-15
P1-16
STFRM+
STFRM-
Synchronizes DSP Communications. JP10-9
JP10-10
P1-18
P1-19
SRD+
SRD-
Synchronous Data from the Analog/Digital
board.
JP10-12
JP10-13
P1-3
P1-4
SRCLK+
SRCLK-
Synchronizes data from the Analog/Digital
Converter board.
JP10-15
JP10-16
P1-6
P1-7
SRFRM+
SRFRM-
Synchronizes DSP Communications. JP10-18
JP10-19
P1-9
P1-10
SYSRST_DAS+
SYSRST_DAS-
Resets the Analog/Digital Converter board. JP10-21
JP10-22
P1-21
P1-22
INTEGRATE+
INTEGRATE-
Data integration signal. Generated by the C-
Arm Interface board.
JP10-24
JP10-25
P1-24
P1-25
XR_ZEROX_DAS+
XR_ZEROX_DAS-
AC line zero-crossing signal used for system
wide synchronization. Generated by the C-Arm
Interface board.
JP10-27
JP10-28
P1-27
P1-28
STD+, STD-
STCLK+, STCLK-
STFRM+, STFRM-
SRD+, SRD-
SRCLK+, SRCLK-
SRFRM+, SRFRM-
SYSRST_DAS+, SYSRST_DAS-
INTEGRATE+, INTEGRATE-
XR_ZEROX_DAS+, XR_ZEROX_DAS-
+15V
15V_RET
-15V
+7V
ANALOG/DIGITAL
CONVERTOR
BOARD
C-ARM INTERFACE
BOARD