Features
Technology Features
·
High-performance RISC Architecture
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Low-power Fully Static CMOS Design
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Operating Voltage:
f
SYS
=4MHz: 2.2V~5.5V
f
SYS
=8MHz: 3.3V~5.5V
·
Power Consumption:
2mA Typical at 5V 4MHz
Maximum of 1mA Standby Current at 3V with WDT and RTC Disabled
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Temperature Range:
Operating Temperature -40°Cto85°C (Industrial Grade)
Storage Temperature -50°Cto125°C
Kernel Features
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Program Memory:
1K´14 OTP/Mask ROM (HT48R10A-1/HT48C10-1)
2K´14 OTP/Mask ROM (HT48R30A-1/HT48C30-1)
4K´15 OTP/Mask ROM (HT48R50A-1/HT48C50-1)
8K´16 OTP/Mask ROM (HT48R70A-1/HT48C70-1)
16K´16 OTP/Mask ROM (HT48RU80/HT48CU80)
· Data Memory:
64´8 SRAM (HT48R10A-1/HT48C10-1)
96´8 SRAM (HT48R30A-1/HT48C30-1)
160´8 SRAM (HT48R50A-1/HT48C50-1)
224´8 SRAM (HT48R70A-1/HT48C70-1)
576´8 SRAM (HT48RU80/HT48CU80)
· Table Read Function
· Multi-level Hardware Stack:
4-level (HT48R10A-1/HT48C10-1, HT48R30A-1/HT48C30-1)
6-level (HT48R50A-1/HT48C50-1)
16-level (HT48R70A-1/HT48C70-1, HT48RU80/HT48CU80)
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Direct and Indirect Data Addressing Mode
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Bit Manipulation Instructions
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63 Powerful Instructions
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Most Instructions Implemented in 1 Machine Cycle
4
I/O Type MCU
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