Timer Registers - TMR, TMR0, TMR0L/TMR0H, TMR1L/TMR1H, TMR2
The timer registers are special function registers located in the special purpose Data Memory and
is the place where the actual timer value is stored. For the 8-bit timer, this register is known as
TMR for the HT48R10A-1/HT48C10-1 and HT48R30A-1/HT48C30-1 devices, TMR0 for the
HT48R50A-1/HT48C50-1 devices and TMR2 for the HT48RU80/HT48CU80 devices. In the case
of the 16-bit timer, a pair of 8-bit registers is required to store the16-bit timer value. These register
pairs are known as TMR0L/TMR0H or TMR1L/TMR1H depending upon which device and timer is
used. The value in the timer registers increases by one each time an internal clock pulse is re
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ceived or an external transition occurs on the external timer pin. The timer will count from the initial
value loaded by the preload register to the full count of FFH for the 8-bit timer or FFFFH for the
16-bit timers at which point the timer overflows and an internal interrupt signal is generated. The
timer value will then be reset with the initial preload register value and continue counting.
Note that to achieve a maximum full range count of FFH for the 8-bit timer or FFFFH for the 16-bit
timers, the preload registers must first be cleared to all zeros. It should be noted that after
power-on, the preload registers will be in an unknown condition. Note that if the Timer/Event Coun-
ters are in an OFF condition and data is written to their preload registers, this data will be immedi-
ately written into the actual counter. However, if the counter is enabled and counting, any new data
written into the preload data register during this period will remain in the preload register and will
only be written into the actual counter the next time an overflow occurs. Note also that when the
timer registers are read, the timer clock will be blocked to avoid errors, however, as this may result
in certain timing errors, programmers must take this into account.
For devices which have an internal 16-bit Timer/Event Counter, and which therefore have both low
byte and high byte timer registers, accessing these registers is carried out in a specific way. It must
be noted that when using instructions to preload data into the low byte register, namely TMR0L or
TMR1L, the data will only be placed in a low byte buffer and not directly into the low byte register.
The actual transfer of the data into the low byte register is only carried out when a write to its associ
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ated high byte register, namely TMR0H or TMR1H, is executed. On the other hand, using instruc
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tions to preload data into the high byte timer register will result in the data being directly written to
the high byte register. At the same time the data in the low byte buffer will be transferred into its as
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sociated low byte register. For this reason, when preloading data into the 16-bit timer registers, the
low byte should be written first. It must also be noted that to read the contents of the low byte regis
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ter, a read to the high byte register must first be executed to latch the contents of the low byte
buffer into its associated low byte register. After this has been done, the low byte register can be
read in the normal way. Note that reading the low byte timer register will only result in reading the
previously latched contents of the low byte buffer and not the actual contents of the low byte timer
register.
Chapter 1 Hardware Structure
43
T M R 2
T 2 E
T i m e r / E v e n t C o u n t e r
M o d e C o n t r o l
T 2 O N
P r e l o a d R e g i s t e r
T i m e r / E v e n t
C o u n t e r
D a t a B u s
R e l o a d
O v e r f l o w
t o I n t e r r u p
8 - s t a g e P r e s c a l e r
T 2 P S C 2 ~ T 2 P S C 0
( 1 / 2 ~ 1 / 2 5 6 )
8 - B i t T i m e r / E v e n t C o u n t e r
T 2 M 1 T 2 M 0
C o n f i g u r a t i o n
O p t i o n
f
S Y S
R T C O s c i l l a t o r
8-bit Timer/Event Counter 2 Structure - HT48RU80/HT48CU80
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