Under normal program operation, the WDT time-out will initialize a ²chip reset² and set the status
bit ²TO². However, if the system is in the Power Down Mode, only a WDT time-out reset from
²HALT² will be initialized which will only reset the Program Counter and Stack Pointer. Three meth
-
ods can be adopted to clear the contents of the WDT including the WDT prescaler. The first is an
external hardware reset (a low level on the RES
pin), the second is via software instructions and
the third is via a ²HALT² instruction. There are two methods of using software instructions to clear
the Watchdog Timer, one of which must be chosen by configuration option. The first option is to
use the single ²CLR WDT² instruction while the second is to use the two commands ²CLR WDT1²
and ²CLR WDT2². For the first option, a simple execution of ²CLR WDT² will clear the WDT while
for the second option, both ²CLR WDT1² and ²CLR WDT2² must both be executed to successfully
clear the WDT. Note that for this second option, if ²CLR WDT1² is used to clear the WDT, succes
-
sive executions of this instruction will have no effect, only the execution of a ²CLR WDT2² instruc
-
tion will clear the WDT. Similarly, after the ²CLR WDT2² instruction has been executed, only a
successive ²CLR WDT1² instruction can clear the Watchdog Timer.
Configuration Options
Configuration options refer to certain options within the MCU that are programmed into the device
during the programming process. During the development process, these options are selected us
-
ing the HT-IDE software development tools. As these options are programmed into the device us
-
ing the hardware programming tools, once they are selected they cannot be changed later as the
application software has no control over the configuration options. Although functionally similar,
the OTP and Mask type devices differ in the way that their configuration options are setup. For
OTP devices these options can be selected using the HT-IDE development tools, and can there
-
fore be re-configured before the device is programmed, however for Mask level devices the op
-
tions are programmed into the device during the manufacturing stage.
All options must be defined for proper system function, the details of which are shown in the table.
No. Option
1 WDT clock source: WDT oscillator or f
SYS
/4 or RTC oscillator or disable
2 CLRWDT instructions: 1 or 2 instructions
3
Timer/Event Counter clock source: f
SYS
or RTC oscillator
(HT48R10A-1/HT48C10-1 and HT48R30A-1/HT48C30-1)
4
Timer/Event Counter 0 clock source: f
SYS
or RTC oscillator
(HT48R50A-1/HT48C50-1 and HT48R70A-1/HT48C70-1)
5 Timer/Event Counter 0 clock source: f
SYS
/4 or RTC oscillator (HT48RU80/HT48CU80)
6
Timer/Event Counter 1 clock source: f
SYS
/4 or RTC oscillator
(HT48R50A-1/HT48C50-1, HT48R70A-1/HT48C70-1 and HT48RU80/HT48CU80)
7 Timer/Event Counter 2 clock source: f
SYS
or RTC oscillator (HT48RU80/HT48CU80)
8 PA0~PA7 wake-up: enable or disable
9 PA Schmitt Trigger or non Schmitt Trigger
10 PA, PB, PC, PD, PE, PF and PG pull-high enable or disable (port numbers are device dependent)
11
Buzzer function: single BZ enable or both BZ and BZ
enable or both disable
Buzzer clock source: timer 0 or timer 1 (HT48R50A-1/HT48C50-1, HT48RU80/HT48CU80)
Chapter 1 Hardware Structure
89
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