Further explanation on each of the bits is given below:
·
TEIE
This bit enables or disables the transmitter empty interrupt. If this bit is equal to ²1², when the
transmitter empty TXIF flag is set, due to a transmitter empty condition, the UART interrupt re
-
quest flag will be set. If this bit is equal to ²0², the UART interrupt request flag will not be influ
-
enced by the condition of the TXIF flag.
·
TIIE
This bit enables or disables the transmitter idle interrupt. If this bit is equal to ²1², when the trans
-
mitter idle TIDLE flag is set, the UART interrupt request flag will be set. If this bit is equal to ²0²,
the UART interrupt request flag will not be influenced by the condition of the TIDLE flag.
·
RIE
This bit enables or disables the receiver interrupt. If this bit is equal to ²1², when the receiver
overrun OERR flag or receive data available RXIF flag is set, the UART interrupt request flag will
be set. If this bit is equal to ²0², the UART interrupt will not be influenced by the condition of the
OERR or RXIF flags.
·
WAKE
This bit enables or disables the receiver wake-up function. If this bit is equal to ²1², and if the
MCU is in the Power Down Mode, a low going edge on the RX input pin will wake-up the device.
If this bit is equal to ²0², and if the MCU is in the Power Down Mode, any edge transitions on the
RX pin will not wake-up the device.
·
ADDEN
The ADDEN bit is the address detect mode bit. When this bit is ²1² the address detect mode is
enabled. When this occurs, if the 8th bit, which corresponds to RX7 if BNO=0, or the 9th bit,
which corresponds to RX8 if BNO=1, has a value of ²1² then the received word will be identified
as an address, rather than data. If the corresponding interrupt is enabled, an interrupt request
will be generated each time the received word has the address bit set, which is the 8th or 9th bit
depending on the value of BNO. If the address bit is ²0², an interrupt will not be generated, and
the received data will be discarded.
· BRGH
The BRGH bit selects the high or low speed mode of the Baud Rate Generator. This bit, together
with the value placed in the BRG register, controls the Baud Rate of the UART. If this bit is equal
to ²1², the high speed mode is selected. If the bit is equal to ²0² the low speed mode is selected.
·
RXEN
The RXEN bit is the Receiver Enable Bit. When this bit is equal to ²0², the receiver will be dis
-
abled with any pending data receptions being aborted. In addition the buffer will be reset. In this
situation the RX pin can be used as a general purpose I/O pin. If the RXEN bit is equal to ²1², the
receiver will be enabled and if the UARTEN bit is equal to ²1², the RX pin will be controlled by the
UART. Clearing the RXEN bit during a transmission will cause the data reception to be aborted
and will reset the receiver. If this occurs, the RX pin can be used as a general purpose I/O pin.
·
TXEN
The TXEN bit is the Transmitter Enable Bit. When this bit is equal to ²0², the transmitter will be
disabled with any pending transmissions being aborted. In addition the buffer will be reset. In
this situation the TX pin can be used as a general purpose I/O pin. If the TXEN bit is equal to ²1²,
the transmitter will be enabled and if the UARTEN bit is equal to ²1², the TX pin will be controlled
72
I/O Type MCU
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