Infineon PGSISI-2 - Figure 10 Schematic of the Evaluation Board

Evaluation Board
User’s Manual 15 Rev. 1.2, 2013-06-06
Software Description for Evaluation Kits
Figure 10 Schematic of the Evaluation Board
PGSISI
100n
nc
nc
3V9
220R, 500mW
100n
4k7
BS170_SOT23
nc
100n
nc
Vprog
CS_B
4k7
nc
DIN_FOC
TLI4970
0R 0R 0R 0R 0R
0R
IP+
IP-
TLI4970
nc
4u7 100n4u7
nc
0R
nc
Ext_Trig_Periodic Ext_Trig_Start
0R
0R
0R
0R
10k
10k
0R
GPG
GPGGPG
M4970-Char
EMC
V2.1
114 215 316 417 518 619 720 821 922 1023 1124 1225 13
X2
C11
1 2 3 4 5 6 7 8 9 10 11 12
JP11
1 2 3 4 5 6 7 8 9
10
11
12 13
JP12
C4
1 2 3 4 5
JP1
1 2 3 4 5
JP2
R5
D2
R6
VB3V3
C6
T1
VB5V
VB3V3
R2
VB3V3
C2
VB3V3
R3
VB5V
VB5V VB3V3
JP6
J4
J8
VDD33_EXT
R4
VB3V3
R8
VB3V3
J10
CS
5
DOUT
3
FOC
6
GND
1
IP+
7
IP-
8
SCLK
4
VDD
2
DUT_SOCKET
R10 R11 R12 R13 R14
R15
J15
J16
JP4
CS
5
DOUT
3
FOC
6
GND
1
IP+
7
IP-
8
SCLK
4
VDD
2
DUT
R7
VB3V3
115 314 711
810
OE
2
NC0
6
VH
12
VS+
16
VL
4
VS-
9
NC1
13
GND
5
VB5V
C1 C3
VB5V
C8
115
314 711 810
OE
2
NC0
6
VH
12
VS+
16
VL
4
VS-
9
NC1
13
GND
5
C5
1
2
JP3
R9
C7
1 2
JP5
1 2
JP7
R16
R17
R18
R19
R20
R21
VB5V
VB5V
R22
CS
CS
SCLK
SCLK
DOUT
DOUT
FOC
FOC
CS_B_22
CS_B_22
CS_4
CS_4
FOC_9
FOC_9
SCLK_11
SCLK_11
DOUT_23
DOUT_23
DIN
DIN
V3V3
V3V3
DIN_10
DIN_10
VPG3V3
TRIG_P_25
TRIG_P_25
TRIG_S_13
TRIG_S_13
D
SG
Last Change: 25.01.2012 17:26:55
Sheet: 1/1
REV:
EMC_V2.1
TITLE: Drawing: Released / Checked:
Name: Date:
PCB - Design
Doc. Number:
CMOS Driver 5V ==> 3.3V
CMOS Driver 3.3V ==> 5V
+20V Vprog
External VDD for TLI4970
Ext. Trigger Input PERIODIC Ext. Trigger Input START
R1