Intel 8XC251SA - Page 10

8XC251SA, SB, SP, SQ USER’S MANUAL
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12.2.2 Power Off Flag ........................................................................................................12-1
12.3 IDLE MODE................................................................................................................. 12-4
12.3.1 Entering Idle Mode ..................................................................................................12-4
12.3.2 Exiting Idle Mode ....................................................................................................12-5
12.4 POWERDOWN MODE................................................................................................ 12-5
12.4.1 Entering Powerdown Mode .....................................................................................12-6
12.4.2 Exiting Powerdown Mode .......................................................................................12-6
12.5 ON-CIRCUIT EMULATION (ONCE) MODE................................................................ 12-7
12.5.1 Entering ONCE Mode .............................................................................................12-7
12.5.2 Exiting ONCE Mode ................................................................................................12-7
CHAPTER 13
EXTERNAL MEMORY INTERFACE
13.1 OVERVIEW ................................................................................................................. 13-1
13.2 EXTERNAL BUS CYCLES .......................................................................................... 13-3
13.2.1 Bus Cycle Definitions ..............................................................................................13-3
13.2.2 Nonpage Mode Bus Cycles ....................................................................................13-4
13.2.3 Page Mode Bus Cycles ...........................................................................................13-5
13.3 WAIT STATES............................................................................................................. 13-8
13.4 EXTERNAL BUS CYCLES WITH CONFIGURABLE WAIT STATES.......................... 13-8
13.4.1 Extending RD#/WR#/PSEN# ..................................................................................13-8
13.4.2 Extending ALE ......................................................................................................13-10
13.5 EXTERNAL BUS CYCLES WITH REAL-TIME WAIT STATES................................. 13-10
13.5.1 Real-time WAIT# Enable (RTWE) .........................................................................13-12
13.5.2 Real-time WAIT CLOCK Enable (RTWCE) ...........................................................13-12
13.5.3 Real-time Wait State Bus Cycle Diagrams ............................................................13-12
13.6 CONFIGURATION BYTE BUS CYCLES................................................................... 13-15
13.7 PORT 0 AND PORT 2 STATUS ................................................................................ 13-16
13.7.1 Port 0 and Port 2 Pin Status in Nonpage Mode ....................................................13-16
13.7.2 Port 0 and Port 2 Pin Status in Page Mode ..........................................................13-17
13.8 EXTERNAL MEMORY DESIGN EXAMPLES............................................................ 13-18
13.8.1 Example 1: RD1:0 = 00, 18-bit Bus, External Flash and RAM ..............................13-18
13.8.2 Example 2: RD1:0 = 01, 17-bit Bus, External Flash and RAM ..............................13-20
13.8.3 Example 3: RD1:0 = 01, 17-bit Bus, External RAM ..............................................13-22
13.8.4 Example 4: RD1:0 = 10, 16-bit Bus, External RAM ..............................................13-24
13.8.5 Example 5: RD1:0 = 11, 16-bit Bus, External EPROM and RAM .........................13-26
13.8.5.1 An Application Requiring Fast Access to the Stack .........................................13-26
13.8.5.2 An Application Requiring Fast Access to Data .................................................13-26
13.8.6 Example 6: RD1:0 = 11, 16-bit Bus, External EPROM and RAM .........................13-29
13.8.7 Example 7: RD1:0 = 01, 17-bit Bus, External Flash ..............................................13-30