Intel 8XC251SA User Manual

8XC251SA, SB, SP, SQ USER’S MANUAL
10-8
Implemented in hardware, automatic address recognition enhances the multiprocessor communi-
cation feature by allowing the serial port to examine the address of each incoming command
frame. Only when the serial port recognizes its own address does the receiver set the RI bit in the
SCON register to generate an interrupt. This ensures that the CPU is not interrupted by command
frames addressed to other devices.
If desired, you may enable the automatic address recognition feature in mode 1. In this configu-
ration, the stop bit takes the place of the ninth data bit. The RI bit is set only when the received
command frame address matches the device’s address and is terminated by a valid stop bit.
NOTE
The multiprocessor communication and automatic address recognition features
cannot be enabled in mode 0 (i.e., setting the SM2 bit in the SCON register in
mode 0 has no effect).
To support automatic address recognition, a device is identified by a given address and a broad-
cast address.
10.5.1 Given Address
Each device has an individual address that is specified in the SADDR register; the SADEN reg-
ister is a mask byte that contains don't-care bits (defined by zeros) to form the device’s given ad-
dress. These don't-care bits provide the flexibility to address one or more slaves at a time. The
following example illustrates how a given address is formed. Note that to address a device by its
individual address, the SADEN mask byte must be 1111 1111.
The following is an example of how to use given addresses to address different slaves:
SADDR
SADEN
Given
=
=
=
0101 0110
1111 1100
0101 01XX
Slave A: SADDR
SADEN
Given
=
=
=
1111 0001
1111 1010
1111 0X0X
Slave C: SADDR
SADEN
Given
=
=
=
1111 0010
1111 1101
1111 00X1
Slave B: SADDR
SADEN
Given
=
=
=
1111 0011
1111 1001
1111 0XX1

Intel 8XC251SA Specifications

General

Brand	Intel
Model	8XC251SA
Category	Microcontrollers
Language	English