Intel 8XC251SA - Page 14

8XC251SA, SB, SP, SQ USER’S MANUAL
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FIGURES
Figure Page
13-23 Bus Diagram for Example 4: 87C251SB/83C251SB in Nonpage Mode ..................13-24
13-24 Address Space for Example 4..................................................................................13-25
13-25 Bus Diagram for Example 5: 80C251SB in Nonpage Mode.....................................13-27
13-26 Address Space for Examples 5 and 6......................................................................13-28
13-27 Bus Diagram for Example 6: 80C251SB in Page Mode...........................................13-29
13-28 Bus Diagram for Example 7: 80C251SB in Page Mode...........................................13-30
14-1 Setup for Programming and Verifying Nonvolatile Memory........................................14-5
14-2 Program/Verify Bus Cycles.........................................................................................14-6
B-1 8XC251SA, SB, SP, SQ 44-pin PLCC Package ......................................................... B-1
B-2 8XC251SA, SB, SP, SQ 40-pin PDIP and Ceramic DIP Packages ............................ B-3