Intel 8XC251SA - Page 264

8XC251SA, SB, SP, SQ USER’S MANUAL
A-12
Table A-18. State Times to Access the Port SFRs
Instruction
Case 0
Execution Times
Additional State Times
Binary Source Case 1 Case 2 Case 3 Case 4
ADD A,dir8 1 1 1 2 3 4
ADD Rm,dir8 3 2 1 2 3 4
ADDC A,dir8 1 1 1 2 3 4
ANL A,dir8 1 1 1 2 3 4
ANL CY,bit 3 2 1 2 3 4
ANL CY,bit51 1 1 1 2 3 4
ANL CY,/bit 3 2 1 2 3 4
ANL CY,/bit51 1 1 1 2 3 4
ANL dir8,#data 3 3 2 4 6 8
ANL dir8,A 2 2 2 4 6 8
ANL Rm,dir8 3 2 1 2 3 4
CLR bit 4 3 2 4 6 8
CLR bit51 2 2 2 4 6 8
CMP Rm,dir8 3 2 1 2 3 4
CPL bit 4 3 2 4 6 8
CPL bit51 2 2 2 4 6 8
DEC dir8 2 2 2 4 6 8
INC dir8 2 2 2 4 6 8
MOV A,dir8 1 1 1 2 3 4
MOV bit,CY 4 3 2 4 6 8
MOV bit51,CY 2 2 2 4 6 8
MOV CY,bit 321234
MOV CY,bit51 1 1 1 2 3 4
MOV dir8,#data 3 3 1 2 3 4
MOV dir8,A 2 2 1 2 3 4
MOV dir8,Rm 4 3 1 2 3 4
MOV dir8,Rn 2 3 1 2 3 4
MOV Rm,dir8 3 2 1 2 3 4
MOV Rn,dir8 121234
ORL A,dir8 1 1 1 2 3 4
ORL CY,bit 3 2 1 2 3 4
ORL CY,bit51 1 1 1 2 3 4
ORL CY,/bit 321234