A-53
INSTRUCTION SET REFERENCE
Example: Register 0 contains 7FH (01111111B). On-chip RAM locations 7EH and 7FH contain 00H
and 40H, respectively. After executing the instruction sequence
DEC @R0
DEC R0
DEC @R0
register 0 contains 7EH and on-chip RAM locations 7EH and 7FH are set to 0FFH and 3FH,
respectively.
Variations
DEC A
Binary Mode Source Mode
Bytes: 11
States: 11
Hex Code in: Binary Mode = [Encoding]
Source Mode = [Encoding]
Operation: DEC
(A) ← (A) – 1
DEC dir8
Binary Mode Source Mode
Bytes: 22
States: 2† 2†
†If this instruction addresses a port (P
x
,
x
= 0–3), add 2 states.
Hex Code in: Binary Mode = [Encoding]
Source Mode = [Encoding]
Operation: DEC
(dir8) ← (dir8) – 1
DEC @Ri
Binary Mode Source Mode
Bytes: 12
States: 34
Hex Code in: Binary Mode = [Encoding]
Source Mode = [A5][Encoding]
Operation: DEC
((Ri)) ← ((Ri)) – 1
[Encoding] 0 0 0 1 0 1 0 0
[Encoding] 0 0 0 1 0 1 0 1 dir addr
[Encoding] 0 0 0 1 0 1 1 i
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