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Intel 8XC251SA
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A-55
INSTRUCTION SET REFERENCE
Hex Code in: Binary Mode = [A5][Encoding]
Source Mode = [Encoding]
Operation: DEC
(WRj) (WRj) – #short
DEC DRk,#short
Binary Mode Source Mode
Bytes: 32
States: 54
Hex Code in: Binary Mode = [A5][Encoding]
Source Mode = [Encoding]
Operation: DEC
(DRk) (DRk) – #short
DIV <dest>,<src>
Function: Divide
Description: Divides the unsigned integer in the register by the unsigned integer operand in register
addressing mode and clears the CY and OV flags.
For byte operands (<dest>,<src> = Rmd,Rms) the result is 16 bits. The 8-bit quotient is
stored in the higher byte of the word where Rmd resides; the 8-bit remainder is stored in the
lower byte of the word where Rmd resides. For example: Register 1 contains 251 (0FBH or
11111011B) and register 5 contains 18 (12H or 00010010B). After executing the instruction
DIV R1,R5
register 1 contains 13 (0DH or 00001101B); register 0 contains 17 (11H or 00010001B),
since 251 = (13 X 18) + 17; and the CY and OV bits are clear (see Flags).
Flags: The CY flag is cleared. The N flag is set if the MSB of the quotient is set. The Z flag is set if
the quotient is zero.
Exception: if <src> contains 00H, the values returned in both operands are undefined; the
CY flag is cleared, OV flag is set, and the rest of the flags are undefined.
[Encoding] 0 0 0 1 1 0 1 1 t t t t 0 1 v v
[Encoding] 0 0 0 1 1 0 1 1 u u u u 1 1 v v
CY AC OV N Z
0—✓✓✓
CY AC OV N Z
01??

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