Intel 8XC251SA - Page 351

A-99
INSTRUCTION SET REFERENCE
Example: The MCS 251 controller is operating in nonpage mode. An external 256-byte RAM using
multiplexed address/data lines (e.g., an Intel 8155 RAM/I/O/Timer) is connected to port 0.
Port 3 provides control lines for the external RAM. ports 1 and 2 are used for normal I/O. R0
and R1 contain 12H and 34H. Location 34H of the external RAM contains 56H. After
executing the instruction sequence
MOVX A,@R1
MOVX @R0,A
the accumulator and external RAM location 12H contain 56H.
Variations
MOVX A,@DPTR
Binary Mode Source Mode
Bytes: 11
States: 55
Hex Code in: Binary Mode = [Encoding]
Source Mode = [Encoding]
Operation: MOVX
(A) ← ((DPTR))
MOVX A,@Ri
Binary Mode Source Mode
Bytes: 11
States: 33
Hex Code in: Binary Mode = [Encoding]
Source Mode = [A5][Encoding]
Operation: MOVX
(A) ← ((Ri))
MOVX @DPTR,A
Binary Mode Source Mode
Bytes: 11
States: 55
Hex Code in: Binary Mode = [Encoding]
Source Mode = [Encoding]
Operation: MOVX
((DPTR)) ← (A)
[Encoding] 1 1 1 0 0 0 0 0
[Encoding] 1 1 1 0 0 0 1 i
[Encoding] 1 1 1 1 0 0 0 0