EasyManua.ls Logo

Intel 8XC251SA - Page 383

Intel 8XC251SA
458 pages
To Next Page IconTo Next Page
To Next Page IconTo Next Page
To Previous Page IconTo Previous Page
To Previous Page IconTo Previous Page
Loading...
A-131
INSTRUCTION SET REFERENCE
XCH A,@Ri
Binary Mode Source Mode
Bytes: 12
States: 45
Hex Code in: Binary Mode = [Encoding]
Source Mode = [A5][Encoding]
Operation: XCH
(A) ((Ri))
XCH A,Rn
Binary Mode Source Mode
Bytes: 12
States: 34
Hex Code in: Binary Mode = [Encoding]
Source Mode = [A5][Encoding]
Operation: XCH
(A) (Rn)
Variations
XCHD A,@Ri
Function: Exchange digit
Description: Exchanges the low nibble of the accumulator (bits 3-0), generally representing a
hexadecimal or BCD digit, with that of the on-chip RAM location indirectly addressed by the
specified register. Does not affect the high nibble (bits 7-4) of either register.
Flags:
Example: R0 contains the address 20H, the accumulator contains 36H (00110110B), and on-chip RAM
location 20H contains 75H (01110101B). After executing the instruction
XCHD A,@R0
on-chip RAM location 20H contains 76H (01110110B) and 35H (00110101B) in the accumu-
lator.
[Encoding] 1 1 0 0 0 1 1 i
[Encoding] 1 1 0 0 1 r r r
CY AC OV N Z
—————

Table of Contents

Other manuals for Intel 8XC251SA

Related product manuals