Intel 8XC251SA User Manual

8XC251SA, SB, SP, SQ USER’S MANUAL
C-12
DPH
Address: S:83H
Reset State: 0000 0000B
Data Pointer High. DPH provides SFR access to register file location 58 (also named DPH). DPH is
the upper byte of the 16-bit data pointer, DPTR. Instructions in the MCS
®
51 architecture use DPTR
for data moves, code moves, and for a jump instruction (JMP @A+DPTR). See also DPL and DPXL.
7 0
DPH Contents
Bit
Number
Bit
Mnemonic
Function
7:0 DPH.7:0 Data Pointer High:
Bits 8–15 of the extended data pointer, DPX (DR56).
DPL
Address: S:82H
Reset State: 0000 0000B
Data Pointer Low. DPL provides SFR access to register file location 59 (also named DPL). DPL is the
low byte of the 16-bit data pointer, DPTR. Instructions in the MCS
®
51 architecture use the 16-bit data
pointer for data moves, code moves, and for a jump instruction (JMP @A+DPTR). See also DPH and
DPXL.
7 0
DPL Contents
Bit
Number
Bit
Mnemonic
Function
7:0 DPL.7:0 Data Pointer Low:
Bits 0–7 of the extended data pointer, DPX (DR56).

Intel 8XC251SA Specifications

General

Brand	Intel
Model	8XC251SA
Category	Microcontrollers
Language	English