Intel 8XC251SA - Page 430

8XC251SA, SB, SP, SQ USER’S MANUAL
C-28
T2MOD
Address: S:C9H
Reset State: XXXX XX00B
Timer 2 Mode Control Register. Contains the timer 2 down count enable and clock-out enable bits for
timer 2 .
7 0
———— ——T2OEDCEN
Bit
Number
Bit
Mnemonic
Function
7:2 — Reserved:
The values read from these bits are indeterminate. Write zeros to these
bits.
1 T2OE Timer 2 Output Enable Bit:
In the timer 2 clock-out mode, connects the programmable clock output
to external pin T2.
0 DCEN Down Count Enable Bit:
Configures timer 2 as an up/down counter.