Intel 8XC251SA - Page 433

C-31
REGISTERS
TH0, TL0
Address: TH0 S:8CH
TL0 S:8AH
Reset State: 0000 0000B
TH0, TL0 Timer Registers. These registers operate in cascade to form the 16-bit timer register in timer
0 or separately as 8-bit timer/counters.
7 0
High/Low Byte of Timer 0 Register
Bit
Number
Bit
Mnemonic
Function
7:0 TH0.7:0
TL0.7:0
High byte of the timer 0 timer register.
Low byte of the timer 0 timer register.
TH1, TL1
Address: TH1 S:8DH
TL1 S:8BH
Reset State: 0000 0000B
TH1, TL1 Timer Registers. These registers operate in cascade to form the 16-bit timer register in timer
1 or separately as 8-bit timer/counters.
7 0
High/Low Byte of Timer 1 Register
Bit
Number
Bit
Mnemonic
Function
7:0 TH1.7:0
TL1.7:0
High byte of the timer 1 timer register.
Low byte of the timer 1 timer register.