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Intel E810-CQDA2T - Channel 1 Configurations

Intel E810-CQDA2T
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722960-002 21
Intel
®
Ethernet Network Adapter E810-CQDA2T
User Guide
4.4 Channel 1 Configurations
1. SMA1 as 1PPS input:
# echo 1 1 > /sys/class/net/$ETH/device/ptp/ptp*/pins/SMA1
# dmesg
[792194.583302] ice 0000:03:00.0: SMA1 RX
[792194.583304] ice 0000:03:00.0: SMA2 <current_state> U.FL2 <current_state>
2. SMA1 as 1PPS output:
# echo 2 1 > /sys/class/net/$ETH/device/ptp/ptp*/pins/SMA1
# dmesg
[792505.312096] ice 0000:03:00.0: SMA1 TX
[792505.312098] ice 0000:03:00.0: SMA2 <current_state> U.FL2 <current_state>
Note: Setting SMA1 as TX automatically enables U.FL1 as RX.
3. U.FL1 as 1PPS output:
# echo 2 1 > /sys/class/net/$ETH/device/ptp/ptp*/pins/U.FL1
# dmesg
[792745.238452] ice 0000:03:00.0: SMA1 RX + uFL1 TX
[792745.238453] ice 0000:03:00.0: SMA2 <current_state> U.FL2 <current_state>
Note: Setting U.FL1 as a TX automatically enables SMA1 as RX.
4. SMA1 as 1PPS input and U.FL1 as 1PPS output:
# echo 1 1 > /sys/class/net/$ETH/device/ptp/ptp*/pins/SMA1
echo 2 1 > /sys/class/net/$ETH/device/ptp/ptp*/pins/U.FL1
# dmesg
[27158.812512] ice 0000:03:00.0: SMA1 RX + uFL1 TX
[27158.812519] ice 0000:03:00.0: SMA2 <current_state> U.FL2 <current_state>
5. Disable SMA1:
# echo 0 1 > /sys/class/net/$ETH/device/ptp/ptp*/pins/SMA1
# dmesg
[793017.697870] ice 0000:03:00.0: SMA1 + U.FL1 disabled
SMA2 <current_state> U.FL2 <current_state>
Note: Users must first disable U.FL1, as it shares the same channel number.
6. Disable U.FL1:
# echo 0 1 > /sys/class/net/$ETH/device/ptp/ptp*/pins/U.FL1
# dmesg
[793017.697870] ice 0000:03:00.0: SMA1 + U.FL1 disabled
[793017.812519] ice 0000:03:00.0: SMA2 <current_state> U.FL2 <current_state>
Note: Users must first disable SMA1, as it shares the same channel number.
Note: To compensate for path delay in the network, users can implement phase delay in
Channel 1 using command (input pin 4 is SMA1. 7000 is equal to 7 ns):
# echo "in pin 4 phase_delay 7000" > /sys/class/net/$ETH/device/pin_cfg

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