Intel E810-CQDA2T - Advanced DPLL Configuration; Pin_Cfg User Readable Format

Intel
®
Ethernet Network Adapter E810-CQDA2T
User Guide
28 722960-002
legacy-rx : off
cgu_fast_lock: off
dpll_monitor : on
extts_filter : off
itu_g8262_filter_used:off
allow-no-fec-modules-in-auto : off
Enabling DPLL monitoring:
ethtool --set-priv-flags $ETH dpll_monitor on
Disabling DPLL monitoring:
ethtool --set-priv-flags $ETH dpll_monitor off
4.11 Advanced DPLL Configuration
4.11.1 pin_cfg User Readable Format
The DPLL on the E810-CQDA2T offer some advanced configuration options. These options are not
needed on regular applications and can cause problems. Please use these commands with extra care.
The DPLL will go back to the default values after a power cycle of the adapter.
The E810-CQDA2T supports embedded sync (eSync), including embedded pulse per second (ePPS), but
not embedded pulse per two seconds (ePP2S).
Timing signals on the SMAs can be configured as inputs or outputs, typically configured for one pulse
per second (1PPS) operation, but they will support a 10 MHz or 25 MHz signal (with or without the
embedded 1PPS eSync).
Note: Do not change any other output pin than 0 and 1.
The Ref-sync pair (e_ref_sync) feature uses two DPLL inputs, one is used as a reference clock (typically
higher than 1 KHz) and a sync signal (1PPS). This feature allows a wider loop bandwidth resulting in
much faster DPLL lock time and was also empirically found to be required to pass ITU-T certification.
This Ref-sync_pair feature can be enabled on SMA or SDP (input pin 1 for SDP (pairing pin 0 & 1) and
pin 5 for SMA (pairing pin 4 &5)
Note: In the pin_cfg the eSync/Ref-sync column 0: both eSync and e_ref_sync are disabled, 1:
eSync is enabled, 2: Ref-sync_pair is enabled.
To check the DPLL pin configuration:
# cat /sys/class/net/ens4f0/device/pin_cfg
in
| pin| enabled| state| freq| phase_delay| eSync/Ref-sync| DPLL0 prio| DPLL1 prio|
| 0| 1| invalid| 1| 0| 0| 255| 5|
| 1| 1| invalid| 10000000| 0| 2| 255| 4|
| 2| 1| invalid| 1953125| 0| 0| 8| 8|
| 3| 1| invalid| 1953125| 0| 0| 9| 9|
| 4| 1| invalid| 1953125| 0| 0| 10| 10|
| 5| 1| invalid| 1953125| 0| 0| 11| 11|
| 6| 1| invalid| 1| 7000| 0| 3| 3|
| 7| 1| invalid| 1| 7000| 2| 2| 2|
| 8| 1| invalid| 1| 0| 0| 0| 0|