Intel E810-CQDA2T - Synce Setup; External Connections; Physical Clock Recovery

Intel
®
Ethernet Network Adapter E810-CQDA2T
User Guide
52 722960-002
5.6 SyncE Setup
This configuration shows how to specifically setup SyncE. Note that users can use this SyncE
configuration with tools such as ptp4l together for clock recovery. SyncE ITU G.811 and G8262 can
assist with better frequency synchronization.
There are two main configuration options for SyncE:
• Only physical clock recovery (Section 5.6.2).
• With ITU G.8264 ESMC messaging using synce4l (Section 5.6.3).
5.6.1 External Connections
5.6.2 Physical Clock Recovery
Before proceeding, it is recommended to set all SMA and U.FL connectors to off (see Section 4.0).
1. Set relevant interface device (only top command is essential):
# export ETH=`grep 000f /sys/class/net/*/device/subsystem_device | awk -F"/"
‘{print $5}' | head -n 1’ (port0)
# export ETH1=`grep 000f /sys/class/net/*/device/subsystem_device | awk -F"/"
‘{print $5}' | head -n 2 | tail -n +2’ (port1)
2. To enable recovered clock from port0 on the highest priority clock run:
# echo 1 0 > /sys/class/net/$ETH/device/phy/synce
3. To enable recovered clock from port1 on the lowest priority clock run:
# echo 1 1 > /sys/class/net/$ETH1/device/phy/synce
Note: First integer represents enable (1) or disable (0), and the second represents the highest
clock priority (0) and lowest clock priority (1).
4. Verify if the outputs were set correctly
#dmesg
[19707.757036] ice 0000:18:00.1: Enabled recovered clock: pin C827_0-RCLKB
[19718.804404] ice 0000:18:00.0: <DPLL0> state changed to: unlocked, pin C827_0-
RCLKB
[19718.804920] ice 0000:18:00.0: <DPLL1> state changed to: unlocked, pin C827_0-
RCLKB
[19719.511845] ice 0000:18:00.0: Enabled recovered clock: pin C827_0-RCLKA
Figure 11. External Connections: SyncE Setup
E810-CQDA2T
Follower
Port0
Port1
SMA1
SMA2
U.FL1
U.FL2
E810-CQDA2T
Leader
Blue = SyncE link
Yellow = Alternative SyncE link
Port0
Port1
SMA1
SMA2
U.FL1
U.FL2