Intel E810-CQDA2T - Page 49

722960-002 49
Intel
®
Ethernet Network Adapter E810-CQDA2T
User Guide
3. Enable SMA1 output (for visibility):
# echo 2 1 > /sys/class/net/$ETH/device/ptp/ptp*/pins/SMA1
Or:
• Enable U.FL1 output: (for visibility):
# echo 2 1 > /sys/class/net/$ETH/device/ptp/ptp*/pins/U.FL1
• Enable SMA2 output: (for visibility):
# echo 2 2 > /sys/class/net/$ETH/device/ptp/ptp*/pins/SMA2
Note: If U.FL1 if set to Tx, then SMA1 is also set to Rx and cannot be changed. Make sure no
1PPS input is connected to SMA1 if using U.FL1 as Tx.
4. Verify if the outputs were set correctly:
#dmesg
[27526.767803] ice 0000:84:00.0: SMA1 TX
[27526.767804] ice 0000:84:00.0: SMA2 TX
[27526.852127] ice 0000:18:00.0: <DPLL1> state changed to: unlocked, pin CVL-SDP20
[30243.385109] ice 0000:18:00.0: <DPLL1> state changed to: locked, pin CVL-SDP20
Or:
#dmesg
[27611.114869] ice 0000:84:00.0: SMA1 RX + U.FL1 TX
[27611.114870] ice 0000:84:00.0: SMA2 TX
[27611.824727] ice 0000:18:00.0: <DPLL1> state changed to: unlocked, pin CVL-SDP20
[30243.385109] ice 0000:18:00.0: <DPLL1> state changed to: locked, pin CVL-SDP20
5. Run ptp4l:
# ./ptp4l -i $ETH -i $ETH1 -m - -f ./ptp4l_bc.conf
Note: For BC, it is recommended to use one ptp4l instance.
6. Run synce4l (optional):
#./synce4l -f configs/synce4l.cfg -m
Note: Refer to Section 5.10, “Example synce4l Configuration File for BC”.