ITech IT8700 Series Programming Guide

Remote Control
Copyright © Itech Electronic Co., Ltd. 7
Load Status Register Structure
N.U.
LOGIC OR
QUES
N.U.
N.U.
EVENT
1
2
4
8
16
32
64
128
256
1024
2048
4096
8192
16384
32768
512
CHAN5
LOGIC OR
PS
CSUM
EPU
CHAN2 VF
CHAN7 VF
OC
OT
CONDITION
0
1
2
3
4
5
6
7
8
10
11
12
13
14
15
9
1
2
4
8
16
32
64
128
256
1024
2048
4096
8192
16384
32768
512
WTG
Error Queue
OPER
N.U.
UNR
CHAN1
PS
VON
N.U.
ENABLE
1
2
4
8
16
32
64
128
PTRANSITION
1
2
4
8
16
32
64
128
256
1024
2048
4096
8192
16384
32768
512
CHANNEL STATUS
CHAN6
VON
ENABLE
1
2
4
8
16
32
128
DDE
OC
QUESTIONABLE STATUS
CHAN3 VF
RS
CHAN8 VF
OP
RRV
N.U.
PON
EVENT
0
1
2
3
4
5
6
7
1
2
4
8
16
32
64
128
CHAN2
MAV
EVENT
1
2
4
8
16
32
64
128
256
1024
2048
4096
8192
16384
32768
512
LOGIC OR
CAL
OT
ENABLE
1
2
4
8
16
32
64
128
CHANNEL SUMMARY
CHAN7
N.U.
CONDITION
0
1
2
3
4
5
6
7
8
10
11
12
13
14
15
9
1
2
4
8
16
32
64
128
256
1024
2048
4096
8192
16384
32768
512
RRV
N.U.
ESB
N.U.
ENABLE
1
2
4
8
16
32
64
128
256
1024
2048
4096
8192
16384
32768
512
CHAN4 VF
STANDARD STATUS
N.U.
OPC
LRV
SERVICE
OPERATION STATUS
EPU
ENABLE
1
2
4
8
16
32
64
128
256
1024
2048
4096
8192
16384
32768
512
CME
CHAN3
CHAN8
LOGIC OR
LOGIC OR
NTRANSITION
1
2
4
8
16
32
64
128
256
1024
2048
4096
8192
16384
32768
512
OV
OV
ENABLE
1
2
4
8
16
32
64
128
CHAN5 VF
VF
LOGIC OR
RUN
N.U.
TBF
MSS
RQS
EVENT
0
1
2
3
4
5
6
7
1
2
4
8
16
32
64
128
REQUEST
LRV
EAV
VF
N.U.
CHAN4
QYE
GENERATION
UNR
EVENT
0
1
2
3
4
5
6
7
1
2
4
8
16
32
64
128
CHAN6 VF
RS
N.U.
OP
STATUS BYTE
0
1
2
3
4
5
6
7
1
2
4
8
16
32
64
128
LOGIC OR
Output Queue
EXE
CHAN1 VF
RUN
TBF
1.3 Condition registers
As Figure shows, all status register sets have a condition register. A condition
register is a real-time, read-only register that constantly updates to reflect the
current operating conditions of the instrument.

ITech IT8700 Series Specifications

General

Brand	ITech
Model	IT8700 Series
Category	Test Equipment
Language	English