TEST BANK: A/D
Test 100.1 — A/D
Bank A/D
Inputs Open
Expected Value 153661550 counts
Limits 1200000 counts
Fault Message NO A/D COMM
Description
This A/D test uses the default conditions of the ADC word and the ACDC
word. This sets up the front end of the instrument to a stable configuration.
The MUX word is applied to register U130 which sets lines A0, A1 and A2
of U163 high. This bit pattern selects the S8 input, which connects signal LO
to the D output.
Signal LO is then connected to op amp U166 which is configured for
×
1
gain with feedback through mux switch U129 pin 2 to 3. Signal LO is then
connected to the A/D at A/D_IN.
In the first tests the value is in the form of counts. Signal LO is converted
to counts in the A/D and then compared to a zero by-design value. This test
checks the functionality of the A/D converter. If the 100 series tests fail, all
other tests will be invalid. Measure 0V at A/D-IN. Failures could be the A/
D MUX U163, the A/D buffer U132 and associated circuitry, or almost any
component in the A/D section. Primary checks should be the references and
power supplies, then the control circuit U165.
Bit patterns
Bit pattern Register
QQ
87654321
—U106—
110v1111
QQ
87654321
—U109—
00101111
QQ
87654321
—U134—
1v10000v
—U130—
11111101
QQ
87654321
—U121—
01110010
ACDC_STB
MUX_STB
IC pins: Q8=11, Q7=12, Q6=13, Q5=14, Q4=7, Q3=6, Q2=5, Q1=4
Troubleshooting 2-23