Test 400.3 — NON INV PATH
Bank VAC
Inputs Open
Expected Value <none specified>
Limits <none specified>
Fault Message <none>
Description
This phase resets the circuit to a known state and turns the waveform sig-
nal off. Subsequent tests require that the A/D be in the normal operating
mode.
Bit patterns
Bit pattern Register
QQ
87654321
—U106—
101v0001
QQ
87654321
—U109—
10011111
QQ
87654321
—U134—
1v01000v
—U130—
10011101
QQ
87654321
—U121—
01110000
ACDC_STB
MUX_STB
IC pins: Q8=11, Q7=12, Q6=13, Q5=14, Q4=7, Q3=6, Q2=5, Q1=4
2-42 Troubleshooting
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