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It has two inputs for receiving all data from the Processor and two logic-level outputs (buffered version of
D+ and D-) to the Processor. It also provides an output from the USB differential input that goes into the
Processor.
There is an active-low input that enables the transceiver to transmit data on the bus; when disabled it is in
receive mode.
An active-high input tied to 3.3VDC enables the transceiver to enter to a low-power state while USB is
inactive.
10Base-T / 100BASE-TX/FX Ethernet ports
There are two Ethernet ports on the Engine Board and each port has a unique 48-bit MAC address.
Each Ethernet port consist of the Processor’s Ethernet Controller, an Ethernet transceiver, a 25MHz
crystal, status LED’s, a magnetic transformer and different resistors and capacitors for setting the
configuration.
The KS8721 transceiver’s purpose is physical; it implements the hardware functions for sending and
receiving the Ethernet frames; it handles the line modulation at one side and the binary packet signaling
at the other side.
The interface consists of data signals, management signals and an interrupt signal to alert the Processor
of status change at the physical layer. MII (Media Independent Interface) is set by default mode after
power-up. The MII bus transfers data using 4-bit words (nibble) in each direction (4 transmit data bits, 4
receive data bits). The data is clocked at 25 MHz to achieve 100 Mbit/s speed. The transceiver
automatically configures themselves for 100 or 10Mbps and full or half-duplex operation, using an on-chip
auto-negotiation algorithm. It also has on-chip 10BASE-T output filtering, eliminating the need for external
filters and allowing a single set of line magnetics to be used to meet requirements for both 100BASE-TX
and 10BASE-T.
Programming/Test port
There is a 16-position connector header on Engine Board and it is used as a manufacturer-specific BDM
interface port for programming and test on-board devices.
Linesync and ACFail Control circuit
This circuit receives the Linesync and ACFail signals from the Power Supply and buffers them for the
Processor.
The circuitry consists of a “D” type flip-flop, an inverter gate and three buffer gates.
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