Megmeet MV300 Series - Page 199

199
Fig. 6-68 Schematic diagram of deviation limit
0: PID upper limit given by P14.16 digital
1: PID upper limit given by AI1 analog
2: PID upper limit given by AI2 analog
0: PID lower limit given by P14.17 digital
1: PID lower limit given by AI1 analog
2: PID lower limit given by AI2 analog
Used for limiting the PID output value:
When the PID output serves as the frequency reference, use the maximum output frequency as 100%.
When the PID output serves as the torque reference, use 300% rated torque as 100%.
For the filtering time of the PID regulator output, the bigger the output filtering time is, the slower the
response will become.
0: Positive feature
1: Negative feature, making the PID output reverse its polarization.
Adjust the offset value of the PID control output and set the maximum output frequency as 100.0%.
PID out
p
ut
g
ain 0.0~250.0
(
1.0
)
P14.21
PID offset value
-100.0~100.0%（0.0%）
P14.20
PID out
p
ut feature selection 0~1
(
0
)
P14.19
Out
p
ut filterin
g
time 0.000~10.000s
(
0.010s
)
P14.18
PID lower limit di
g
ital reference 0.0%~P14.16
(
0.0%
)
P14.17
PID u
pp
er limit di
g
ital reference P14.17~100.0%
(
100.0%
)
P14.16
PID lower limit channel 0
~
2
(
0
)
P14.15
PID u
pp
er limit channel 0
~
2
(
0
)
P14.14