563
APPENDICES
A
Appendix 3 List of Special Register Areas
D9027 SD1027 Clock data
Clock data (minute,
second)
This register stores the minute and the second in BCD as
shown below.
Qn(H)
QnPH
QnU
*1
LCPU
D9028 SD1028 Clock data
Clock data (day of
week)
This register stores the day of the week in BCD as shown
below.
Qn(H)
QnPH
QnU
*1
LCPU
D9035 SD1035 SD648
Extension
file register
Use block No.
Stores the block No. of the extension file register being
used in BCD code.
Qn(H)
QnPH
QnU
*1
LCPU
D9036 SD1036
Extension
file register
for
designation
of device
number
Device number
when individual
devices from
extension file
register are directly
accessed
Designate the device number for the extension file register
for direct read and write in 2 words at SD1036 and SD1037
in BIN data. Use consecutive numbers beginning with R0 of
block No. 1 to designate device numbers.
Qn(H)
QnPH
D9037 SD1037
D9038 SD1038 SD207
LED display
priority
ranking
Priorities 1 to 4 • This register stores priority of errors to be indicated by the
ERROR LED (on or flashing).
• Configuration of the priority setting areas is as shown
below.
• For details, refer to the following.
User's manual of the CPU module used
Type ACPU/QCPU-A (A Mode) Programming Manual
(Fundamentals)
Qn(H)
QnPH
D9039 SD1039 SD208 Priorities 5 to 7
D9044 SD1044
For
sampling
trace
Step or time during
sampling trace
To operate the STRA or STRAR instruction of a sampling
trace by turning on or off SM803 with a programming tool,
use the value stored in SD1044 as the sampling trace
condition.
• When "Each scan" is selected: 0
• When a timing is specified: setting value (Unit: 10ms)
Qn(H)
QnPH
D9049 SD1049
Work area
for SFC
Block number of
extension file
register
• This register stores the block No. of the extended file
register used as a work area for executing the SFC
program.
• This register stores "0" when SM320 is off and when
empty area of 16K bytes or smaller is used (16K byte or
less is too small to be used as block No.1 for an extended
file register).
Qn(H)
QnPH
ACPU
special
register
Special
register
after
conversion
Special
register
after
modification
Name Meaning Explanation
Corresponding
CPU
b15
b12b11
b8 b7
b4
b3 b0
to to to to
Example:
35 min, 48 sec.
H3548
Minute
Second
b15 b12 b11 b8 b7 b4 b3 b0
0
1
2
3
4
5
6
to to to to
H0005
Sunday
Saturday
Friday
Thursday
Wednesday
Tuesday
Monday
Day of the week
Example:
Friday
Always set "0"
0
16383
16384
SD1037,SD1036
Device No. (BIN data)
to
to
to
Extension file register
Block No.1
area
Block No.2
area
SD207
SD208
b15 b12
b11
b8 b7 b4 b3 b0to to to to
Priority 4 Priority 3
Priority 7 Priority 6
Priority 2
Priority 5
Priority 1
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