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4 MOTION DEDICATED PLC INSTRUCTION
4.4 Home position return instruction from The PLC CPU to The Motion CPU:
S(P).CHGA (PLC instruction:
S(P).CHGA
)
• Home position return instruction from the PLC CPU to the Motion CPU (S(P).CHGA)
Usable devices
Internal devices
(System, User)
MELSECNET/10
direct J
\
Setting data
(Note)
Bit Word
File
register
Bit
digit
specified
Indirectly
specified
device
Bit Word
Special
function
module
U
\G
Index
register
Z
Constant
K, H
Other
(n1)
(S1)
(S2)
(D1)
(D2)
: Usable : Usable partly
(Note) : Setting data except (S1) : Index qualification possible
(S1)
SP.CHGA
SP.CHGA
Start request
S.CHGA
(S2) (D1)
(D2)
(n1)
(S1)
S.CHGA
(S2) (D1)
(D2)
(n1)
[Instruction] [
Condition]
Start request
[Setting data]
Setting data Description Data type
(n1)
(First I/O No. of the target CPU)/16
Value to specify actually is the following.
(Note-1)
CPU No.2 : 3E1H, CPU No.3 : 3E2H, CPU No.4 : 3E3H
16-bit
binary
(S1)
Axis No. ("Jn")
(Note-2)
to execute the home position return.
Q173CPU(N) : J1 to J32/Q172CPU(N) : J1 to J8
Character
sequence
(S2) Dummy (Set the any of constant etc.)
32-bit
binary
(D1)
Complete devices
(D1+0) : Device which make turn on for one scan at start accept completion of
instruction.
(D1+1) : Device which make turn on for one scan at start accept abnormal
completion of instruction.
("D1+0" also turns on at the abnormal completion.)
Bit
(D2) Device to store the complete status.
16-bit
binary
(Note-1) : Motion CPU cannot used CPU No.1 in the Multiple CPU configuration.
(Note-2) : "n" shows the numerical value which correspond to axis No..
Q173CPU(N) : Axis No.1 to No.32 (n=1 to 32) / Q172CPU(N) : Axis No.1 to No.8 (n=1 to 8)
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