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Motorola APX 3000

Motorola APX 3000
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3-30 Theory of Operation: Controller
3.2.4 OMAP Processor and Memory
3.2.4.1 OMAP Processor (U6302)
The OMAP1710 dual core processor lies at the center of the controller design. The processor
features utilized in the controller design include:
ARM9 CPU core
C55X DSP core
16KB shared internal RAM
SSI Interfaces
USB Interfaces
Timers & Watchdog Timers
Keyboard Matrix Interface
1-Wire Interface
LCD Controller
I2C Interface
SPI interface
External Memory Synchronous Interface
External Memory Asynchronous Interface
•UARTs
•GPIOs
Figure 3-22. Overview of OMAP Interconnection with Controller Peripherals
OMAP 1710
Processor
FLASH
64 MB
Side
Conn -
GCAI
GPS/ BT Chipset
(TINL5500)
CPLD
SDRAM
32 MB
Audio SSI 1
MACE
Secure
IC
MAKO IC
4.096 MHz Clk
Lighting
Controller
USB / UART
SPI
I2C
SSI
32 kHz ClkEMIFS
UART 2
EMIFS
EMIFF
SPI GPIOSSI
Codec
Main Board
UI
GCAI
SPI
RF Section
GPS/BT Module
(TINL5500 &
ATMEL AVR32)

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