National Instruments PCI E Series - Page 160

Index
© National Instruments Corporation I-9 PCI E Series RLPM
programming examples
analog input, 4-8 to 4-31
acquiring one sample from channel 0,
4-9 to 4-12
functions for programming, 4-8
sampling one channel on
AMUX-64T, 4-27 to 4-29
scanning eight channels on
AMUX-64T, 4-29 to 4-31
single wire acquisition, 4-25 to 4-26
STC scanning, 4-12 to 4-14
with DMA, 4-17 to 4-20
with external start and stop
trigger, 4-23 to 4-25
with external start trigger and
scan start pulses, 4-21 to 4-22
with interrupts, 4-14 to 4-17
analog output, 4-31 to 4-44
CPU write to DAC, 4-32 to 4-34
functions for programming, 4-32
waveform generation
with external UPDATE and
external trigger, 4-41 to 4-43
using interrupts, 4-43 to 4-44
using local buffer mode,
4-41 to 4-43
digital I/O, 4-7 to 4-8
files on companion disk, 4-5 to 4-6
general purpose counter/timer,
4-45 to 4-52
buffered pulsewidth measurement,
4-47 to 4-49
continuous pulse train generation,
4-49 to 4-52
gated event counting, 4-45 to 4-47
PROMOUT bit, 3-6, 5-1
pulse train generation example, 4-49 to 4-52
pulsewidth measurement example,
4-47 to 4-49
Pulse_Width_Measurement_ISR
function, 4-48
R
referenced single-ended channel assignments
(table), 3-14
registers
Analog Input Register Group
ADC FIFO Data Register, 3-8
Configuration Memory High
Register, 3-11 to 3-15
Configuration Memory Low
Register, 3-9 to 3-10
overview, 3-7
Analog Output Register Group
AO Configuration Register,
3-16 to 3-17
DAC FIFO Data Register, 3-18
DAC0 Direct Data Register, 3-19
DAC1 Direct Data Register, 3-20
overview, 3-15
DAQ-STC Register Group, 3-24
DMA Control Register Group
AI AO Select Register, 3-22
G0 G1 Select Register, 3-23
overview, 3-21
FIFO Strobe Register Group
ADC FIFO Clear Register, 3-24
Configuration Memory Clear
Register, 3-24
DAC FIFO Clear Register, 3-24
Misc Register Group
Misc Command Register, 3-5
overview, 3-3
Serial Command Register, 3-4
Status Register, 3-6
register maps, 3-2
sizes, 3-3
windowed registers
programming considerations, 4-5
register map, 3-2
ReGlitch bit, 3-17
reglitch circuitry, 2-22