• C
L
: Crystal load capacitance
• C
Pad
: Pad capacitance of the XTAL32M_P and XTAL32M_N pins (~3 pF)
• C
Parasitic
: Parasitic or stray capacitance of external circuit.
Although C
Parasitic
can be ignored in general, the actual board layout and placement of external components influences the optimal
values of external load capacitors. Therefore, it is recommended to fine tune the values of external load capacitors on actual
hardware board to get the accurate clock frequency. For fine tuning, output the RTC Clock to one of the GPIOs and optimize the
values of external load capacitors for minimum frequency deviation. The load capacitors are dependent on the specifications of
the crystal and on the board capacitance. It is recommended to have the crystal manufacturer evaluate the crystal on the PCB.
4.2.1 Crystal Printed Circuit Board (PCB) design guidelines
• Connect the crystal and external load capacitors on the PCB as close as possible to the oscillator input and output pins of
the chip.
• The length of traces in the oscillation circuit should be as short as possible and must not cross other signal lines.
• Ensure that the load capacitors CX1 and CX2, in case of third overtone crystal usage, have a common ground plane.
• Loops must be made as small as possible to minimize the noise coupled in through the PCB and to keep the parasitic as
small as possible.
• Lay out the ground (GND) pattern under crystal unit.
• Do not lay out other signal lines under crystal unit for multi-layered PCB.
4.3 RTC oscillator
In the RTC oscillator circuit, only the 32.768 kHz crystal (XTAL) and the capacitances, CX1 and CX2, need to be connected
externally on XTAL32K_P and XTAL32K_N, as shown in Figure 5.
In bypass mode, an external clock (maximum frequency of up to 100 kHz) can also be connected to XTAL32K_P if XTAL32K_N is
left open. External [0 – VH] square signal can be applied on the XTAL32K_P pin with 1.1 V +/-10%
An external signal below 1.0 V or above 1.2 V cannot be applied.
NXP Semiconductors
Clock circuitry
Hardware Design Guidelines for LPC55(S)xx Microcontrollers, Rev. 0, 30 October 2020
Application Note 8 / 24
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