Table 9. ISP pin assignment (continued)
ISP pin Port pin assignment
HS_SPI_MISO PIO1_3
HS_SPI_MOSI PIO0_26
USB0 ISP mode
USB0_VBUS PIO0_22
USB0_DP Dedicated pin per package
USB0_DM Dedicated pin per package
USB1 ISP mode
USB1_VBUS Dedicated pin per package
USB1_DP Dedicated pin per package
USB1_DM Dedicated pin per package
6 Debug and programing interface
This section describes a number of commonly-used debug connectors. Most of the Arm development tools uses one of these
pin out’s.
When developing your ARM circuit board, it is recommended to use a standard debug signal arrangement to make connection to
debugger easier.
The JTAG functions TRST, TCK, TMS, TDI, and TDO, are selected on pins, PIO0_2 to PIO0_6, by hardware when the part is in
boundary scan mode.
The JTAG functions CANNOT be used for debug mode.
NOTE
The SWD/SWV pins are overlaid on top of the JTAG pins, as shown in Table 10.
Table 10. JTAG and SWD signal description
JTAG mode SWD mode Description MCU port Recommendation
TRST
—
JTAG Test Reset PIO0_2 Pull-Down
TCK
—
JTAG clock into the core PIO0_3 Z
TMS
—
JTAG Test Mode Select PIO0_4 Z
TDI
—
JTAG Test Data Input PIO0_5 Pull-Down
TDO
—
JTAG Test Data Output PIO0_6 Z
—
SWO Serial Wire Debug Trace output PIO0_8 Output, Z
Table continues on the next page...
NXP Semiconductors
Debug and programing interface
Hardware Design Guidelines for LPC55(S)xx Microcontrollers, Rev. 0, 30 October 2020
Application Note 12 / 24
To Next Page
Loading...
Need help?
General
